From patchwork Tue Apr 19 16:07:18 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Hellstrom X-Patchwork-Id: 92015 X-Patchwork-Delegate: davem@davemloft.net Return-Path: X-Original-To: patchwork-incoming@ozlabs.org Delivered-To: patchwork-incoming@ozlabs.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 098A4B7014 for ; Wed, 20 Apr 2011 02:08:10 +1000 (EST) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753295Ab1DSQIJ (ORCPT ); Tue, 19 Apr 2011 12:08:09 -0400 Received: from mail202c2.megamailservers.com ([69.49.111.103]:55203 "EHLO mail202c2.megamailservers.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753244Ab1DSQII (ORCPT ); Tue, 19 Apr 2011 12:08:08 -0400 X-POP-User: magnus.gaisler.com Received: from localhost.localdomain (gaisler.se [92.33.28.242]) by mail202c2.megamailservers.com (8.13.6/8.13.1) with ESMTP id p3JG7ung002635; Tue, 19 Apr 2011 12:08:03 -0400 From: Daniel Hellstrom To: davem@davemloft.net Cc: sparclinux@vger.kernel.org, sam@ravnborg.org Subject: [PATCH 6/7] sparc32, leon: operate on boot-cpu IRQ controller registers Date: Tue, 19 Apr 2011 18:07:18 +0200 Message-Id: <1303229239-21551-6-git-send-email-daniel@gaisler.com> X-Mailer: git-send-email 1.5.4 In-Reply-To: <1303229239-21551-1-git-send-email-daniel@gaisler.com> References: <1303229239-21551-1-git-send-email-daniel@gaisler.com> X-CSC: 0 X-CHA: v=1.1 cv=xbudj22Aknmj7PWPRHa2OUfQBaxQEGnZbHIINz1otWI= c=1 sm=1 a=gv5Cd_ri0ZUA:10 a=U62ajLuCel8A:10 a=jXKJviUpWSOlMmIvGrHOfw==:17 a=ebG-ZW-8AAAA:8 a=2vpKZoPc6y9v1_dVpmoA:9 a=yNcXqRUa-ZCU9B7zqNoA:7 a=cCYF7-FHeg4A:10 a=jXKJviUpWSOlMmIvGrHOfw==:117 Sender: sparclinux-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: sparclinux@vger.kernel.org Each CPU has a separate set of IRQ controller registers, this patch makes sure that the boot-cpu registers are used instead of CPU0's. Note that there are other parts of the SPARC32/LEON port which does not support booting on other than CPU0 anyway, however this this cleans up the IRQ controller layer in that regard. Signed-off-by: Daniel Hellstrom --- arch/sparc/include/asm/leon.h | 1 + arch/sparc/kernel/leon_kernel.c | 14 ++++++++------ 2 files changed, 9 insertions(+), 6 deletions(-) diff --git a/arch/sparc/include/asm/leon.h b/arch/sparc/include/asm/leon.h index 31fb2ac..1776f71 100644 --- a/arch/sparc/include/asm/leon.h +++ b/arch/sparc/include/asm/leon.h @@ -335,6 +335,7 @@ extern int leon_flush_needed(void); extern void leon_switch_mm(void); extern int srmmu_swprobe_trace; extern int leon3_ticker_irq; +extern int leon3_boot_cpu; #ifdef CONFIG_SMP extern int leon_smp_nrcpus(void); diff --git a/arch/sparc/kernel/leon_kernel.c b/arch/sparc/kernel/leon_kernel.c index 80ab271..26acc75 100644 --- a/arch/sparc/kernel/leon_kernel.c +++ b/arch/sparc/kernel/leon_kernel.c @@ -31,6 +31,7 @@ int leondebug_irq_disable; int leon_debug_irqout; static int dummy_master_l10_counter; unsigned long amba_system_id; +int leon3_boot_cpu; static DEFINE_SPINLOCK(leon_irq_lock); unsigned long leon3_gptimer_irq; /* interrupt controller irq number */ @@ -79,8 +80,8 @@ void leon_eirq_setup(unsigned int eirq) */ irq_link(veirq); mask = 1 << eirq; - oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(0)); - LEON3_BYPASS_STORE_PA(LEON_IMASK(0), (oldmask | mask)); + oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(leon3_boot_cpu)); + LEON3_BYPASS_STORE_PA(LEON_IMASK(leon3_boot_cpu), (oldmask | mask)); sparc_leon_eirq = eirq; } @@ -105,8 +106,8 @@ static void leon_unmask_irq(struct irq_data *data) mask = (unsigned long)data->chip_data; spin_lock_irqsave(&leon_irq_lock, flags); - oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(0)); - LEON3_BYPASS_STORE_PA(LEON_IMASK(0), (oldmask | mask)); + oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(leon3_boot_cpu)); + LEON3_BYPASS_STORE_PA(LEON_IMASK(leon3_boot_cpu), (oldmask | mask)); spin_unlock_irqrestore(&leon_irq_lock, flags); } @@ -116,8 +117,8 @@ static void leon_mask_irq(struct irq_data *data) mask = (unsigned long)data->chip_data; spin_lock_irqsave(&leon_irq_lock, flags); - oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(0)); - LEON3_BYPASS_STORE_PA(LEON_IMASK(0), (oldmask & ~mask)); + oldmask = LEON3_BYPASS_LOAD_PA(LEON_IMASK(leon3_boot_cpu)); + LEON3_BYPASS_STORE_PA(LEON_IMASK(leon3_boot_cpu), (oldmask & ~mask)); spin_unlock_irqrestore(&leon_irq_lock, flags); } @@ -205,6 +206,7 @@ void __init leon_init_timers(irq_handler_t counter_fn) leon_debug_irqout = 0; master_l10_counter = (unsigned int *)&dummy_master_l10_counter; dummy_master_l10_counter = 0; + leon3_boot_cpu = hard_smp_processor_id(); rootnp = of_find_node_by_path("/ambapp0"); if (!rootnp)