| Message ID | 1500391820-28680-1-git-send-email-thuth@redhat.com |
|---|---|
| State | Accepted |
| Headers | show |
On 19/07/17 01:30, Thomas Huth wrote: > The functions used a bogus mixture between programming the registers > with pci-next-mem64 and pci-next-mem - the upper register bits were > filled with the value from the 64-bit memory space while the lower > bits were filled with the bits from the 32-bit memory space variable. It is a total rework of two pretty old pieces of code with fewer comments than before (and no new stack comments or smaller words...) and no clear indication of whether it changes the actual behaviour, or does not it? > > Signed-off-by: Thomas Huth <thuth@redhat.com> > --- > slof/fs/pci-scan.fs | 83 +++++++++++++++++++++++++++++------------------------ > 1 file changed, 46 insertions(+), 37 deletions(-) > > diff --git a/slof/fs/pci-scan.fs b/slof/fs/pci-scan.fs > index c39707a..a97afa3 100644 > --- a/slof/fs/pci-scan.fs > +++ b/slof/fs/pci-scan.fs > @@ -104,47 +104,56 @@ here 100 allot CONSTANT pci-device-vec > or swap 20 + rtas-config-l! \ and write it into the Reg > ; > > -\ Update pci-next-mem to be 1MB aligned and set the mem-base and mem-base-upper register > -\ and set the Limit register to the maximum available address space > -\ needed for scanning possible devices behind the bridge > +\ Update pci-next-mem (or mem64) to be aligned and set the mem-base and > +\ mem-base-upper register. Also set the Limit register to the maximum available > +\ address space needed for scanning possible devices behind the bridge > : pci-bridge-set-mem-base ( addr -- ) > - pci-next-mem @ 100000 #aligned \ read the current Value and align to 1MB boundary > - dup pci-next-mem ! \ and write it back > - over 24 + rtas-config-w@ \ check if 64bit support > - 1 and IF \ IF 64 bit support > - pci-next-mem64 @ 100000000 #aligned \ | read the current Value of 64-bit and align to 4GB boundary > - dup 100000000 + pci-next-mem64 x! \ | and write back with 1GB for bridge > - 2 pick swap \ | > - 20 rshift \ | keep upper 32 bits > - swap 28 + rtas-config-l! \ | and write it into the Base-Upper32-bits > - pci-max-mem64 @ 20 rshift \ | fetch max Limit address and keep upper 32 bits > - 2 pick 2C + rtas-config-l! \ | and set the Limit > - THEN \ FI > - 10 rshift \ keep upper 16 bits > - pci-max-mem @ 1- FFFF0000 and or \ and Insert mmem Limit (set it to max) > - swap 24 + rtas-config-l! \ and write it into the bridge > + dup 24 + rtas-config-w@ 1 and \ does bridge support 64-bit? > + pci-next-mem64 @ 0<> and IF \ and do we have 64-bit memory? > + \ Align variable to 4GB boundary > + pci-next-mem64 @ 100000000 #aligned > + dup pci-next-mem64 x! > + \ Set base and limit registers: > + 20 rshift over 28 + rtas-config-l! \ set prefetch base upper 32 bits > + pci-next-mem64 @ 10 rshift FFF0 and > + pci-max-mem64 @ 1- FFF00000 and or > + over 24 + rtas-config-l! \ set prefetch limit & base lower > + pci-max-mem64 @ 1- 20 rshift > + swap 2C + rtas-config-l! \ and set the limit upper 32 bits > + ELSE > + \ Align variable to 1MB boundary > + pci-next-mem @ 100000 #aligned > + dup pci-next-mem ! > + \ Set base and limit register: > + 10 rshift FFF0 and > + pci-max-mem @ 1- FFF00000 and or > + swap 24 + rtas-config-l! > + THEN > ; > > -\ Update pci-next-mem to be 1MB aligned and set the mem-limit register > -\ The Limit Value is one less then the upper boundary > -\ If the limit is less than the base the mem is disabled > +\ Update pci-next-mem (or -mem64) to be aligned (with some additional space > +\ for hot-plugging later) and set the mem-limit register. The Limit Value is > +\ one less then the upper boundary. > : pci-bridge-set-mem-limit ( addr -- ) > - pci-next-mem @ 100000 + \ add space for hot-plugging > - 100000 #aligned \ align to 1MB boundary > - dup pci-next-mem ! \ and write it back > - 1- \ make limit one less than boundary > - over 24 + rtas-config-w@ \ check if 64bit support > - 1 and IF \ IF 64 bit support > - pci-next-mem64 @ 100000000 #aligned \ | Reat current value of 64-bar and align at 4GB > - dup pci-next-mem64 x! \ | and write it back > - 1- \ | make limite one less than boundary > - 2 pick swap \ | > - 20 rshift \ | keep upper 32 bits > - swap 2C + rtas-config-l! \ | and write it into the Limit-Upper32-bits > - THEN \ FI > - FFFF0000 and \ keep upper 16 bits > - over 24 + rtas-config-l@ 0000FFFF and \ fetch original Value > - or swap 24 + rtas-config-l! \ and write it into the bridge > + dup 24 + rtas-config-w@ 1 and \ does bridge support 64-bit? > + pci-next-mem64 @ 0<> and IF \ and do we have 64-bit memory? > + \ Update current variable (add space for hot-plugging and align it) > + pci-next-mem64 @ 80000000 + > + 100000000 #aligned > + dup pci-next-mem64 x! > + \ Update the limit registers: > + 1- 20 rshift > + over 2C + rtas-config-l! \ set the limit upper 32 bits > + pci-next-mem64 @ 1- 10 rshift > + swap 26 + rtas-config-w! \ set limit lower bits > + ELSE > + \ Update current variable (add space for hot-plugging and align it) > + pci-next-mem @ 100000 + > + 100000 #aligned > + dup pci-next-mem ! > + 1- 10 rshift > + swap 26 + rtas-config-w! > + THEN > ; > > \ Update pci-next-io to be 4KB aligned and set the io-base and io-base-upper register >
On 20.07.2017 08:18, Alexey Kardashevskiy wrote: > On 19/07/17 01:30, Thomas Huth wrote: >> The functions used a bogus mixture between programming the registers >> with pci-next-mem64 and pci-next-mem - the upper register bits were >> filled with the value from the 64-bit memory space while the lower >> bits were filled with the bits from the 32-bit memory space variable. > > It is a total rework of two pretty old pieces of code with fewer comments > than before (and no new stack comments or smaller words...) and no clear > indication of whether it changes the actual behaviour, or does not it? Just have a closer look at https://github.com/aik/SLOF/commit/9633e036 and you'll note what's wrong with the code: Initially, all PCI bridge prefetchable memory base registers were programmed with the value from pci-next-mem and the limit registers with the value from pci-max-mem. After that patch, the upper bits were programmed with pci-next-mem64 and pci-max-mem64, while the lower bits were still programmed with pci-next-mem and pci-max-mem! A complete mess, I wonder why this did not cause any trouble before (well, likely because hardly anybody tested PCI bridges before)... I think we really should clean that up ... so would you be willing to accept my patch if I add some more comments to the code there? Thomas
On 20/07/17 18:58, Thomas Huth wrote: > On 20.07.2017 08:18, Alexey Kardashevskiy wrote: >> On 19/07/17 01:30, Thomas Huth wrote: >>> The functions used a bogus mixture between programming the registers >>> with pci-next-mem64 and pci-next-mem - the upper register bits were >>> filled with the value from the 64-bit memory space while the lower >>> bits were filled with the bits from the 32-bit memory space variable. >> >> It is a total rework of two pretty old pieces of code with fewer comments >> than before (and no new stack comments or smaller words...) and no clear >> indication of whether it changes the actual behaviour, or does not it? > > Just have a closer look at https://github.com/aik/SLOF/commit/9633e036 > and you'll note what's wrong with the code: Initially, all PCI bridge > prefetchable memory base registers were programmed with the value from > pci-next-mem and the limit registers with the value from pci-max-mem. > > After that patch, the upper bits were programmed with pci-next-mem64 and > pci-max-mem64, while the lower bits were still programmed with > pci-next-mem and pci-max-mem! A complete mess, I wonder why this did not > cause any trouble before (well, likely because hardly anybody tested PCI > bridges before)... But I am pretty sure it has fixed something at the time though... > I think we really should clean that up ... so would you be willing to > accept my patch if I add some more comments to the code there? I have no doubts the patch fixes the problem. I just wonder if it could be made easier to follow by adding separate words for mem64 - pci-bridge-set-mem64-base/pci-bridge-set-mem64-limit - just like we have them for pci-{next|max}-{mem|mmio|io}. Also stack comments are useful, more than sentences imho. And every time you want to add a comment like "\ Align variable to 1MB boundary" to few lines of code - just make it a separate word - "pci-next-mem-align-1mb" - which won't even need comments (look who I am telling it to) :)
On Fri, Jul 21, 2017 at 12:08:02PM +1000, Alexey Kardashevskiy wrote: > I have no doubts the patch fixes the problem. > > I just wonder if it could be made easier to follow by adding separate words > for mem64 - pci-bridge-set-mem64-base/pci-bridge-set-mem64-limit - just > like we have them for pci-{next|max}-{mem|mmio|io}. Also stack comments are > useful, more than sentences imho. And every time you want to add a comment > like "\ Align variable to 1MB boundary" to few lines of code - just make it > a separate word - "pci-next-mem-align-1mb" - which won't even need comments > (look who I am telling it to) :) If you need names that long, and *still* the name does not make clear what the word does, you probably need to factor differently ;-) Segher
On 22/07/17 06:30, Segher Boessenkool wrote: > On Fri, Jul 21, 2017 at 12:08:02PM +1000, Alexey Kardashevskiy wrote: >> I have no doubts the patch fixes the problem. >> >> I just wonder if it could be made easier to follow by adding separate words >> for mem64 - pci-bridge-set-mem64-base/pci-bridge-set-mem64-limit - just >> like we have them for pci-{next|max}-{mem|mmio|io}. Also stack comments are >> useful, more than sentences imho. And every time you want to add a comment >> like "\ Align variable to 1MB boundary" to few lines of code - just make it >> a separate word - "pci-next-mem-align-1mb" - which won't even need comments >> (look who I am telling it to) :) > > If you need names that long, and *still* the name does not make clear > what the word does, you probably need to factor differently ;-) Probably, I am open for suggestions :) I've posted v2, is it any clearer what the patches are doing and how?
Thomas Huth <thuth@redhat.com> writes: > The functions used a bogus mixture between programming the registers > with pci-next-mem64 and pci-next-mem - the upper register bits were > filled with the value from the 64-bit memory space while the lower > bits were filled with the bits from the 32-bit memory space variable. > > Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> > --- > slof/fs/pci-scan.fs | 83 +++++++++++++++++++++++++++++------------------------ > 1 file changed, 46 insertions(+), 37 deletions(-) > > diff --git a/slof/fs/pci-scan.fs b/slof/fs/pci-scan.fs > index c39707a..a97afa3 100644 > --- a/slof/fs/pci-scan.fs > +++ b/slof/fs/pci-scan.fs > @@ -104,47 +104,56 @@ here 100 allot CONSTANT pci-device-vec > or swap 20 + rtas-config-l! \ and write it into the Reg > ; > > -\ Update pci-next-mem to be 1MB aligned and set the mem-base and mem-base-upper register > -\ and set the Limit register to the maximum available address space > -\ needed for scanning possible devices behind the bridge > +\ Update pci-next-mem (or mem64) to be aligned and set the mem-base and > +\ mem-base-upper register. Also set the Limit register to the maximum available > +\ address space needed for scanning possible devices behind the bridge > : pci-bridge-set-mem-base ( addr -- ) > - pci-next-mem @ 100000 #aligned \ read the current Value and align to 1MB boundary > - dup pci-next-mem ! \ and write it back > - over 24 + rtas-config-w@ \ check if 64bit support > - 1 and IF \ IF 64 bit support > - pci-next-mem64 @ 100000000 #aligned \ | read the current Value of 64-bit and align to 4GB boundary > - dup 100000000 + pci-next-mem64 x! \ | and write back with 1GB for bridge > - 2 pick swap \ | > - 20 rshift \ | keep upper 32 bits > - swap 28 + rtas-config-l! \ | and write it into the Base-Upper32-bits > - pci-max-mem64 @ 20 rshift \ | fetch max Limit address and keep upper 32 bits > - 2 pick 2C + rtas-config-l! \ | and set the Limit > - THEN \ FI > - 10 rshift \ keep upper 16 bits > - pci-max-mem @ 1- FFFF0000 and or \ and Insert mmem Limit (set it to max) > - swap 24 + rtas-config-l! \ and write it into the bridge > + dup 24 + rtas-config-w@ 1 and \ does bridge support 64-bit? > + pci-next-mem64 @ 0<> and IF \ and do we have 64-bit memory? > + \ Align variable to 4GB boundary > + pci-next-mem64 @ 100000000 #aligned > + dup pci-next-mem64 x! > + \ Set base and limit registers: > + 20 rshift over 28 + rtas-config-l! \ set prefetch base upper 32 bits > + pci-next-mem64 @ 10 rshift FFF0 and > + pci-max-mem64 @ 1- FFF00000 and or > + over 24 + rtas-config-l! \ set prefetch limit & base lower > + pci-max-mem64 @ 1- 20 rshift > + swap 2C + rtas-config-l! \ and set the limit upper 32 bits > + ELSE > + \ Align variable to 1MB boundary > + pci-next-mem @ 100000 #aligned > + dup pci-next-mem ! > + \ Set base and limit register: > + 10 rshift FFF0 and > + pci-max-mem @ 1- FFF00000 and or > + swap 24 + rtas-config-l! > + THEN > ; > > -\ Update pci-next-mem to be 1MB aligned and set the mem-limit register > -\ The Limit Value is one less then the upper boundary > -\ If the limit is less than the base the mem is disabled > +\ Update pci-next-mem (or -mem64) to be aligned (with some additional space > +\ for hot-plugging later) and set the mem-limit register. The Limit Value is > +\ one less then the upper boundary. > : pci-bridge-set-mem-limit ( addr -- ) > - pci-next-mem @ 100000 + \ add space for hot-plugging > - 100000 #aligned \ align to 1MB boundary > - dup pci-next-mem ! \ and write it back > - 1- \ make limit one less than boundary > - over 24 + rtas-config-w@ \ check if 64bit support > - 1 and IF \ IF 64 bit support > - pci-next-mem64 @ 100000000 #aligned \ | Reat current value of 64-bar and align at 4GB > - dup pci-next-mem64 x! \ | and write it back > - 1- \ | make limite one less than boundary > - 2 pick swap \ | > - 20 rshift \ | keep upper 32 bits > - swap 2C + rtas-config-l! \ | and write it into the Limit-Upper32-bits > - THEN \ FI > - FFFF0000 and \ keep upper 16 bits > - over 24 + rtas-config-l@ 0000FFFF and \ fetch original Value > - or swap 24 + rtas-config-l! \ and write it into the bridge > + dup 24 + rtas-config-w@ 1 and \ does bridge support 64-bit? > + pci-next-mem64 @ 0<> and IF \ and do we have 64-bit memory? > + \ Update current variable (add space for hot-plugging and align it) > + pci-next-mem64 @ 80000000 + > + 100000000 #aligned > + dup pci-next-mem64 x! > + \ Update the limit registers: > + 1- 20 rshift > + over 2C + rtas-config-l! \ set the limit upper 32 bits > + pci-next-mem64 @ 1- 10 rshift > + swap 26 + rtas-config-w! \ set limit lower bits > + ELSE > + \ Update current variable (add space for hot-plugging and align it) > + pci-next-mem @ 100000 + > + 100000 #aligned > + dup pci-next-mem ! > + 1- 10 rshift > + swap 26 + rtas-config-w! > + THEN > ; > > \ Update pci-next-io to be 4KB aligned and set the io-base and io-base-upper register > -- > 1.8.3.1 > > _______________________________________________ > SLOF mailing list > SLOF@lists.ozlabs.org > https://lists.ozlabs.org/listinfo/slof
On 24/07/17 14:15, Nikunj A Dadhania wrote: > Thomas Huth <thuth@redhat.com> writes: > >> The functions used a bogus mixture between programming the registers >> with pci-next-mem64 and pci-next-mem - the upper register bits were >> filled with the value from the 64-bit memory space while the lower >> bits were filled with the bits from the 32-bit memory space variable. >> >> Signed-off-by: Thomas Huth <thuth@redhat.com> > > Reviewed-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com> Thanks, applied. > >> --- >> slof/fs/pci-scan.fs | 83 +++++++++++++++++++++++++++++------------------------ >> 1 file changed, 46 insertions(+), 37 deletions(-) >> >> diff --git a/slof/fs/pci-scan.fs b/slof/fs/pci-scan.fs >> index c39707a..a97afa3 100644 >> --- a/slof/fs/pci-scan.fs >> +++ b/slof/fs/pci-scan.fs >> @@ -104,47 +104,56 @@ here 100 allot CONSTANT pci-device-vec >> or swap 20 + rtas-config-l! \ and write it into the Reg >> ; >> >> -\ Update pci-next-mem to be 1MB aligned and set the mem-base and mem-base-upper register >> -\ and set the Limit register to the maximum available address space >> -\ needed for scanning possible devices behind the bridge >> +\ Update pci-next-mem (or mem64) to be aligned and set the mem-base and >> +\ mem-base-upper register. Also set the Limit register to the maximum available >> +\ address space needed for scanning possible devices behind the bridge >> : pci-bridge-set-mem-base ( addr -- ) >> - pci-next-mem @ 100000 #aligned \ read the current Value and align to 1MB boundary >> - dup pci-next-mem ! \ and write it back >> - over 24 + rtas-config-w@ \ check if 64bit support >> - 1 and IF \ IF 64 bit support >> - pci-next-mem64 @ 100000000 #aligned \ | read the current Value of 64-bit and align to 4GB boundary >> - dup 100000000 + pci-next-mem64 x! \ | and write back with 1GB for bridge >> - 2 pick swap \ | >> - 20 rshift \ | keep upper 32 bits >> - swap 28 + rtas-config-l! \ | and write it into the Base-Upper32-bits >> - pci-max-mem64 @ 20 rshift \ | fetch max Limit address and keep upper 32 bits >> - 2 pick 2C + rtas-config-l! \ | and set the Limit >> - THEN \ FI >> - 10 rshift \ keep upper 16 bits >> - pci-max-mem @ 1- FFFF0000 and or \ and Insert mmem Limit (set it to max) >> - swap 24 + rtas-config-l! \ and write it into the bridge >> + dup 24 + rtas-config-w@ 1 and \ does bridge support 64-bit? >> + pci-next-mem64 @ 0<> and IF \ and do we have 64-bit memory? >> + \ Align variable to 4GB boundary >> + pci-next-mem64 @ 100000000 #aligned >> + dup pci-next-mem64 x! >> + \ Set base and limit registers: >> + 20 rshift over 28 + rtas-config-l! \ set prefetch base upper 32 bits >> + pci-next-mem64 @ 10 rshift FFF0 and >> + pci-max-mem64 @ 1- FFF00000 and or >> + over 24 + rtas-config-l! \ set prefetch limit & base lower >> + pci-max-mem64 @ 1- 20 rshift >> + swap 2C + rtas-config-l! \ and set the limit upper 32 bits >> + ELSE >> + \ Align variable to 1MB boundary >> + pci-next-mem @ 100000 #aligned >> + dup pci-next-mem ! >> + \ Set base and limit register: >> + 10 rshift FFF0 and >> + pci-max-mem @ 1- FFF00000 and or >> + swap 24 + rtas-config-l! >> + THEN >> ; >> >> -\ Update pci-next-mem to be 1MB aligned and set the mem-limit register >> -\ The Limit Value is one less then the upper boundary >> -\ If the limit is less than the base the mem is disabled >> +\ Update pci-next-mem (or -mem64) to be aligned (with some additional space >> +\ for hot-plugging later) and set the mem-limit register. The Limit Value is >> +\ one less then the upper boundary. >> : pci-bridge-set-mem-limit ( addr -- ) >> - pci-next-mem @ 100000 + \ add space for hot-plugging >> - 100000 #aligned \ align to 1MB boundary >> - dup pci-next-mem ! \ and write it back >> - 1- \ make limit one less than boundary >> - over 24 + rtas-config-w@ \ check if 64bit support >> - 1 and IF \ IF 64 bit support >> - pci-next-mem64 @ 100000000 #aligned \ | Reat current value of 64-bar and align at 4GB >> - dup pci-next-mem64 x! \ | and write it back >> - 1- \ | make limite one less than boundary >> - 2 pick swap \ | >> - 20 rshift \ | keep upper 32 bits >> - swap 2C + rtas-config-l! \ | and write it into the Limit-Upper32-bits >> - THEN \ FI >> - FFFF0000 and \ keep upper 16 bits >> - over 24 + rtas-config-l@ 0000FFFF and \ fetch original Value >> - or swap 24 + rtas-config-l! \ and write it into the bridge >> + dup 24 + rtas-config-w@ 1 and \ does bridge support 64-bit? >> + pci-next-mem64 @ 0<> and IF \ and do we have 64-bit memory? >> + \ Update current variable (add space for hot-plugging and align it) >> + pci-next-mem64 @ 80000000 + >> + 100000000 #aligned >> + dup pci-next-mem64 x! >> + \ Update the limit registers: >> + 1- 20 rshift >> + over 2C + rtas-config-l! \ set the limit upper 32 bits >> + pci-next-mem64 @ 1- 10 rshift >> + swap 26 + rtas-config-w! \ set limit lower bits >> + ELSE >> + \ Update current variable (add space for hot-plugging and align it) >> + pci-next-mem @ 100000 + >> + 100000 #aligned >> + dup pci-next-mem ! >> + 1- 10 rshift >> + swap 26 + rtas-config-w! >> + THEN >> ; >> >> \ Update pci-next-io to be 4KB aligned and set the io-base and io-base-upper register >> -- >> 1.8.3.1 >> >> _______________________________________________ >> SLOF mailing list >> SLOF@lists.ozlabs.org >> https://lists.ozlabs.org/listinfo/slof > > _______________________________________________ > SLOF mailing list > SLOF@lists.ozlabs.org > https://lists.ozlabs.org/listinfo/slof >
diff --git a/slof/fs/pci-scan.fs b/slof/fs/pci-scan.fs index c39707a..a97afa3 100644 --- a/slof/fs/pci-scan.fs +++ b/slof/fs/pci-scan.fs @@ -104,47 +104,56 @@ here 100 allot CONSTANT pci-device-vec or swap 20 + rtas-config-l! \ and write it into the Reg ; -\ Update pci-next-mem to be 1MB aligned and set the mem-base and mem-base-upper register -\ and set the Limit register to the maximum available address space -\ needed for scanning possible devices behind the bridge +\ Update pci-next-mem (or mem64) to be aligned and set the mem-base and +\ mem-base-upper register. Also set the Limit register to the maximum available +\ address space needed for scanning possible devices behind the bridge : pci-bridge-set-mem-base ( addr -- ) - pci-next-mem @ 100000 #aligned \ read the current Value and align to 1MB boundary - dup pci-next-mem ! \ and write it back - over 24 + rtas-config-w@ \ check if 64bit support - 1 and IF \ IF 64 bit support - pci-next-mem64 @ 100000000 #aligned \ | read the current Value of 64-bit and align to 4GB boundary - dup 100000000 + pci-next-mem64 x! \ | and write back with 1GB for bridge - 2 pick swap \ | - 20 rshift \ | keep upper 32 bits - swap 28 + rtas-config-l! \ | and write it into the Base-Upper32-bits - pci-max-mem64 @ 20 rshift \ | fetch max Limit address and keep upper 32 bits - 2 pick 2C + rtas-config-l! \ | and set the Limit - THEN \ FI - 10 rshift \ keep upper 16 bits - pci-max-mem @ 1- FFFF0000 and or \ and Insert mmem Limit (set it to max) - swap 24 + rtas-config-l! \ and write it into the bridge + dup 24 + rtas-config-w@ 1 and \ does bridge support 64-bit? + pci-next-mem64 @ 0<> and IF \ and do we have 64-bit memory? + \ Align variable to 4GB boundary + pci-next-mem64 @ 100000000 #aligned + dup pci-next-mem64 x! + \ Set base and limit registers: + 20 rshift over 28 + rtas-config-l! \ set prefetch base upper 32 bits + pci-next-mem64 @ 10 rshift FFF0 and + pci-max-mem64 @ 1- FFF00000 and or + over 24 + rtas-config-l! \ set prefetch limit & base lower + pci-max-mem64 @ 1- 20 rshift + swap 2C + rtas-config-l! \ and set the limit upper 32 bits + ELSE + \ Align variable to 1MB boundary + pci-next-mem @ 100000 #aligned + dup pci-next-mem ! + \ Set base and limit register: + 10 rshift FFF0 and + pci-max-mem @ 1- FFF00000 and or + swap 24 + rtas-config-l! + THEN ; -\ Update pci-next-mem to be 1MB aligned and set the mem-limit register -\ The Limit Value is one less then the upper boundary -\ If the limit is less than the base the mem is disabled +\ Update pci-next-mem (or -mem64) to be aligned (with some additional space +\ for hot-plugging later) and set the mem-limit register. The Limit Value is +\ one less then the upper boundary. : pci-bridge-set-mem-limit ( addr -- ) - pci-next-mem @ 100000 + \ add space for hot-plugging - 100000 #aligned \ align to 1MB boundary - dup pci-next-mem ! \ and write it back - 1- \ make limit one less than boundary - over 24 + rtas-config-w@ \ check if 64bit support - 1 and IF \ IF 64 bit support - pci-next-mem64 @ 100000000 #aligned \ | Reat current value of 64-bar and align at 4GB - dup pci-next-mem64 x! \ | and write it back - 1- \ | make limite one less than boundary - 2 pick swap \ | - 20 rshift \ | keep upper 32 bits - swap 2C + rtas-config-l! \ | and write it into the Limit-Upper32-bits - THEN \ FI - FFFF0000 and \ keep upper 16 bits - over 24 + rtas-config-l@ 0000FFFF and \ fetch original Value - or swap 24 + rtas-config-l! \ and write it into the bridge + dup 24 + rtas-config-w@ 1 and \ does bridge support 64-bit? + pci-next-mem64 @ 0<> and IF \ and do we have 64-bit memory? + \ Update current variable (add space for hot-plugging and align it) + pci-next-mem64 @ 80000000 + + 100000000 #aligned + dup pci-next-mem64 x! + \ Update the limit registers: + 1- 20 rshift + over 2C + rtas-config-l! \ set the limit upper 32 bits + pci-next-mem64 @ 1- 10 rshift + swap 26 + rtas-config-w! \ set limit lower bits + ELSE + \ Update current variable (add space for hot-plugging and align it) + pci-next-mem @ 100000 + + 100000 #aligned + dup pci-next-mem ! + 1- 10 rshift + swap 26 + rtas-config-w! + THEN ; \ Update pci-next-io to be 4KB aligned and set the io-base and io-base-upper register
The functions used a bogus mixture between programming the registers with pci-next-mem64 and pci-next-mem - the upper register bits were filled with the value from the 64-bit memory space while the lower bits were filled with the bits from the 32-bit memory space variable. Signed-off-by: Thomas Huth <thuth@redhat.com> --- slof/fs/pci-scan.fs | 83 +++++++++++++++++++++++++++++------------------------ 1 file changed, 46 insertions(+), 37 deletions(-)