From patchwork Mon May 15 11:45:32 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Huth X-Patchwork-Id: 762450 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3wRJg92g3cz9s4q for ; Mon, 15 May 2017 21:45:41 +1000 (AEST) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3wRJg91tswzDqZW for ; Mon, 15 May 2017 21:45:41 +1000 (AEST) X-Original-To: slof@lists.ozlabs.org Delivered-To: slof@lists.ozlabs.org Received: from mx1.redhat.com (mx1.redhat.com [209.132.183.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3wRJg61kBmzDqP0 for ; Mon, 15 May 2017 21:45:38 +1000 (AEST) Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 58AAA3D971; Mon, 15 May 2017 11:45:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 58AAA3D971 Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=thuth@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 58AAA3D971 Received: from thh440s.redhat.com (ovpn-116-247.ams2.redhat.com [10.36.116.247]) by smtp.corp.redhat.com (Postfix) with ESMTP id C2BAC17991; Mon, 15 May 2017 11:45:33 +0000 (UTC) From: Thomas Huth To: slof@lists.ozlabs.org Date: Mon, 15 May 2017 13:45:32 +0200 Message-Id: <1494848732-16497-1-git-send-email-thuth@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Mon, 15 May 2017 11:45:36 +0000 (UTC) Subject: [SLOF] [PATCH] pci: Reserve free space at the end of bridge windows instead of at the beginning X-BeenThere: slof@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: "Patches for https://github.com/aik/SLOF" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: slof-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "SLOF" This reverts commit e53c2541784fba7951c8aa6ccdbe4412fb03fca6 ("pci-scan: reserve memory for pci-bridge without devices"). That commit reserved some free space on PCI bridges at the beginning of the bridges' memory windows (by adjusting the pci-next-[mem|mmio|io] variables during the pci-bridge-set-[mem|mmio|io]-base functions). While this was basically a good idea, this way also had two drawbacks: 1) There also might be free space at the end of the window (since the base of the next bridge window has to be aligned, too), so the free space on the bridge is non-contiguous. 2) As soon as there was at least one device on the bridge that uses at least some few byte in the I/O space, SLOF reserved at least 8k of I/O space on the bridge - which is a *lot* in the scarce I/O space, so that for example it was not possible anymore to next 8 PCI bridges with devices attached to them (see the buglink below for details). It's better to reserve the free space at the end of the memory windows instead (in the pci-bridge-set-[mem|mmio|io]-limit functions), and with regards to the scarce I/O space, we should also reserve less I/O memory on each bridge, so we use a limit of 2k (plus alignment) here now. Buglink: https://bugzilla.redhat.com/show_bug.cgi?id=1443433 Signed-off-by: Thomas Huth Reviewed-by: Nikunj A Dadhania --- slof/fs/pci-scan.fs | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/slof/fs/pci-scan.fs b/slof/fs/pci-scan.fs index c0dbbed..9578189 100644 --- a/slof/fs/pci-scan.fs +++ b/slof/fs/pci-scan.fs @@ -81,7 +81,7 @@ here 100 allot CONSTANT pci-device-vec \ needed for scanning possible devices behind the bridge : pci-bridge-set-mmio-base ( addr -- ) pci-next-mmio @ 100000 #aligned \ read the current Value and align to 1MB boundary - dup 100000 + pci-next-mmio ! \ and write back with 1MB for bridge + dup pci-next-mmio ! \ and write it back 10 rshift \ mmio-base reg is only the upper 16 bits pci-max-mmio @ 1- FFFF0000 and or \ and Insert mmio Limit (set it to max) swap 20 + rtas-config-l! \ and write it into the bridge @@ -91,7 +91,8 @@ here 100 allot CONSTANT pci-device-vec \ The Limit Value is one less then the upper boundary \ If the limit is less than the base the mmio is disabled : pci-bridge-set-mmio-limit ( addr -- ) - pci-next-mmio @ 100000 #aligned \ fetch current value and align to 1MB + pci-next-mmio @ 100000 + \ add space for hot-plugging + 100000 #aligned \ align to 1MB boundary dup pci-next-mmio ! \ and write it back 1- FFFF0000 and \ make it one less and keep upper 16 bits over 20 + rtas-config-l@ 0000FFFF and \ fetch original value @@ -103,7 +104,7 @@ here 100 allot CONSTANT pci-device-vec \ needed for scanning possible devices behind the bridge : pci-bridge-set-mem-base ( addr -- ) pci-next-mem @ 100000 #aligned \ read the current Value and align to 1MB boundary - dup 100000 + pci-next-mem ! \ and write back with 1MB for bridge + dup pci-next-mem ! \ and write it back over 24 + rtas-config-w@ \ check if 64bit support 1 and IF \ IF 64 bit support pci-next-mem64 @ 100000000 #aligned \ | read the current Value of 64-bit and align to 4GB boundary @@ -123,7 +124,8 @@ here 100 allot CONSTANT pci-device-vec \ The Limit Value is one less then the upper boundary \ If the limit is less than the base the mem is disabled : pci-bridge-set-mem-limit ( addr -- ) - pci-next-mem @ 100000 #aligned \ read the current Value and align to 1MB boundary + pci-next-mem @ 100000 + \ add space for hot-plugging + 100000 #aligned \ align to 1MB boundary dup pci-next-mem ! \ and write it back 1- \ make limit one less than boundary over 24 + rtas-config-w@ \ check if 64bit support @@ -145,7 +147,7 @@ here 100 allot CONSTANT pci-device-vec \ needed for scanning possible devices behind the bridge : pci-bridge-set-io-base ( addr -- ) pci-next-io @ 1000 #aligned \ read the current Value and align to 4KB boundary - dup 1000 + pci-next-io ! \ and write back with 4K for bridge + dup pci-next-io ! \ and write it back over 1C + rtas-config-l@ \ check if 32bit support 1 and IF \ IF 32 bit support 2dup 10 rshift \ | keep upper 16 bits @@ -162,7 +164,8 @@ here 100 allot CONSTANT pci-device-vec \ The Limit Value is one less then the upper boundary \ If the limit is less than the base the io is disabled : pci-bridge-set-io-limit ( addr -- ) - pci-next-io @ 1000 #aligned \ read the current Value and align to 4KB boundary + pci-next-io @ 800 + \ add space for hot-plugging + 1000 #aligned \ align to 4KB boundary dup pci-next-io ! \ and write it back 1- \ make limit one less than boundary over 1D + rtas-config-b@ \ check if 32bit support