From patchwork Fri Aug 31 04:16:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Andrew Donnellan X-Patchwork-Id: 964283 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 421mKs5PPbz9ryn for ; Fri, 31 Aug 2018 14:17:37 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 421mKs454BzF38G for ; Fri, 31 Aug 2018 14:17:37 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=au1.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=andrew.donnellan@au1.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=au1.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 421mJR6x98zF36D for ; Fri, 31 Aug 2018 14:16:23 +1000 (AEST) Received: from pps.filterd (m0098396.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w7V4ELQU020950 for ; Fri, 31 Aug 2018 00:16:21 -0400 Received: from e06smtp05.uk.ibm.com (e06smtp05.uk.ibm.com [195.75.94.101]) by mx0a-001b2d01.pphosted.com with ESMTP id 2m6vudjv5p-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Fri, 31 Aug 2018 00:16:21 -0400 Received: from localhost by e06smtp05.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 31 Aug 2018 05:16:16 +0100 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps4075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w7V4GFPk27197586 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=FAIL); Fri, 31 Aug 2018 04:16:15 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 300C64C052; Fri, 31 Aug 2018 07:16:13 +0100 (BST) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8E1EF4C04A; Fri, 31 Aug 2018 07:16:12 +0100 (BST) Received: from ozlabs.au.ibm.com (unknown [9.192.253.14]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 31 Aug 2018 07:16:12 +0100 (BST) Received: from intelligence.ozlabs.ibm.com (haven.au.ibm.com [9.192.254.114]) (using TLSv1.2 with cipher DHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by ozlabs.au.ibm.com (Postfix) with ESMTPSA id C8563A037F; Fri, 31 Aug 2018 14:16:11 +1000 (AEST) From: Andrew Donnellan To: skiboot@lists.ozlabs.org Date: Fri, 31 Aug 2018 14:16:02 +1000 X-Mailer: git-send-email 2.11.0 In-Reply-To: References: In-Reply-To: References: X-TM-AS-GCONF: 00 x-cbid: 18083104-0020-0000-0000-000002BF120C X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18083104-0021-0000-0000-0000210C1EE3 Message-Id: MIME-Version: 1.0 X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-08-31_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1807170000 definitions=main-1808310044 Subject: [Skiboot] [PATCH v3 5/6] hw/npu2, platform: Restructure OpenCAPI i2c reset/presence pins X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.27 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: arbab@linux.ibm.com, fbarrat@linux.vnet.ibm.com Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" In platform_ocapi, we define i2c_{reset,presence}_odl{0,1} to specify the appropriate reset/presence GPIO pins for devices connected to ODL0 and ODL1 respectively. This is obviously wrong, because a device connected to brick 2 and a device connected to brick 4 are going to be different devices connected to different I2C pins, but rather conveniently we haven't had to deal with systems that can use the full 4 bricks as yet. Now that we're adding OpenCAPI support for Witherspoon, we should change this to specify pins separately for all 4 bricks. Replace i2c_{reset,presence}_odl{0,1} with i2c_{reset,presence}_brick{2,3,4,5} and update the presence detection code, device reset code, and existing platforms accordingly. Signed-off-by: Andrew Donnellan Reviewed-by: Frederic Barrat Reviewed-by: Oliver O'Halloran --- v1->v2: - rename the i2c fields from pin* to brick* to be clearer (Oliver) v2->v3: - rename the i2c fields in the commit message... (Oliver) --- core/platform.c | 24 ++++++++++++++---------- hw/npu2-common.c | 9 +++++++-- hw/npu2-opencapi.c | 10 +++++++--- include/platform.h | 12 ++++++++---- platforms/astbmc/zaius.c | 22 +++++++++++++--------- platforms/ibm-fsp/zz.c | 24 ++++++++++++++---------- 6 files changed, 63 insertions(+), 38 deletions(-) diff --git a/core/platform.c b/core/platform.c index 4b3eaa4bd1d1..7985ce564509 100644 --- a/core/platform.c +++ b/core/platform.c @@ -172,21 +172,25 @@ static int generic_start_preload_resource(enum resource_id id, uint32_t subid, /* These values will work for a ZZ booted using BML */ const struct platform_ocapi generic_ocapi = { - .i2c_engine = 1, - .i2c_port = 4, - .i2c_reset_addr = 0x20, - .i2c_reset_odl0 = (1 << 1), - .i2c_reset_odl1 = (1 << 6), - .i2c_presence_addr = 0x20, - .i2c_presence_odl0 = (1 << 2), /* bottom connector */ - .i2c_presence_odl1 = (1 << 7), /* top connector */ + .i2c_engine = 1, + .i2c_port = 4, + .i2c_reset_addr = 0x20, + .i2c_reset_brick2 = (1 << 1), + .i2c_reset_brick3 = (1 << 6), + .i2c_reset_brick4 = 0, /* unused */ + .i2c_reset_brick5 = 0, /* unused */ + .i2c_presence_addr = 0x20, + .i2c_presence_brick2 = (1 << 2), /* bottom connector */ + .i2c_presence_brick3 = (1 << 7), /* top connector */ + .i2c_presence_brick4 = 0, /* unused */ + .i2c_presence_brick5 = 0, /* unused */ /* * The ZZs we typically use for BML/generic platform tend to * have old planars and presence detection is broken there, so * force presence. */ - .force_presence = true, - .odl_phy_swap = true, + .force_presence = true, + .odl_phy_swap = true, }; static struct bmc_platform generic_bmc = { diff --git a/hw/npu2-common.c b/hw/npu2-common.c index 15da3d316c24..82c4c1773203 100644 --- a/hw/npu2-common.c +++ b/hw/npu2-common.c @@ -115,11 +115,16 @@ static bool _i2c_presence_detect(struct npu2_dev *dev) switch (dev->link_index) { case 2: - data = platform.ocapi->i2c_presence_odl0; + data = platform.ocapi->i2c_presence_brick2; break; case 3: - data = platform.ocapi->i2c_presence_odl1; + data = platform.ocapi->i2c_presence_brick3; break; + case 4: + data = platform.ocapi->i2c_presence_brick4; + break; + case 5: + data = platform.ocapi->i2c_presence_brick5; default: OCAPIERR(dev, "presence detection on invalid link\n"); return true; diff --git a/hw/npu2-opencapi.c b/hw/npu2-opencapi.c index b5a32dd32244..5e258e1aff07 100644 --- a/hw/npu2-opencapi.c +++ b/hw/npu2-opencapi.c @@ -816,12 +816,16 @@ static void assert_reset(struct npu2_dev *dev) switch (dev->brick_index) { case 2: - case 4: - pin = platform.ocapi->i2c_reset_odl0; + pin = platform.ocapi->i2c_reset_brick2; break; case 3: + pin = platform.ocapi->i2c_reset_brick3; + break; + case 4: + pin = platform.ocapi->i2c_reset_brick4; + break; case 5: - pin = platform.ocapi->i2c_reset_odl1; + pin = platform.ocapi->i2c_reset_brick5; break; default: assert(false); diff --git a/include/platform.h b/include/platform.h index efafbd2239b9..fee5a76cf9e8 100644 --- a/include/platform.h +++ b/include/platform.h @@ -50,11 +50,15 @@ struct platform_ocapi { uint8_t i2c_engine; /* I2C engine number */ uint8_t i2c_port; /* I2C port number */ uint8_t i2c_reset_addr; /* I2C address for reset */ - uint8_t i2c_reset_odl0; /* I2C pin to write to reset ODL0 */ - uint8_t i2c_reset_odl1; /* I2C pin to write to reset ODL1 */ + uint8_t i2c_reset_brick2; /* I2C pin to write to reset brick 2 */ + uint8_t i2c_reset_brick3; /* I2C pin to write to reset brick 3 */ + uint8_t i2c_reset_brick4; /* I2C pin to write to reset brick 4 */ + uint8_t i2c_reset_brick5; /* I2C pin to write to reset brick 5 */ uint8_t i2c_presence_addr; /* I2C address for presence detection */ - uint8_t i2c_presence_odl0; /* I2C mask for detection on ODL0 */ - uint8_t i2c_presence_odl1; /* I2C mask for detection on ODL1 */ + uint8_t i2c_presence_brick2; /* I2C pin to read for presence on brick 2 */ + uint8_t i2c_presence_brick3; /* I2C pin to read for presence on brick 3 */ + uint8_t i2c_presence_brick4; /* I2C pin to read for presence on brick 4 */ + uint8_t i2c_presence_brick5; /* I2C pin to read for presence on brick 5 */ bool force_presence; /* don't use i2c detection */ bool odl_phy_swap; /* Swap ODL1 to use brick 2 rather than * brick 1 lanes */ diff --git a/platforms/astbmc/zaius.c b/platforms/astbmc/zaius.c index 267e6578bbe7..0eed10c706d0 100644 --- a/platforms/astbmc/zaius.c +++ b/platforms/astbmc/zaius.c @@ -26,15 +26,19 @@ #include "astbmc.h" const struct platform_ocapi zaius_ocapi = { - .i2c_engine = 1, - .i2c_port = 4, - .i2c_reset_addr = 0x20, - .i2c_reset_odl0 = (1 << 1), - .i2c_reset_odl1 = (1 << 6), - .i2c_presence_addr = 0x20, - .i2c_presence_odl0 = (1 << 2), /* bottom connector */ - .i2c_presence_odl1 = (1 << 7), /* top connector */ - .odl_phy_swap = true, + .i2c_engine = 1, + .i2c_port = 4, + .i2c_reset_addr = 0x20, + .i2c_reset_brick2 = (1 << 1), + .i2c_reset_brick3 = (1 << 6), + .i2c_reset_brick4 = 0, /* unused */ + .i2c_reset_brick5 = 0, /* unused */ + .i2c_presence_addr = 0x20, + .i2c_presence_brick2 = (1 << 2), /* bottom connector */ + .i2c_presence_brick3 = (1 << 7), /* top connector */ + .i2c_presence_brick4 = 0, /* unused */ + .i2c_presence_brick5 = 0, /* unused */ + .odl_phy_swap = true, }; #define NPU_BASE 0x5011000 diff --git a/platforms/ibm-fsp/zz.c b/platforms/ibm-fsp/zz.c index 7c717d3c7087..e54472699c59 100644 --- a/platforms/ibm-fsp/zz.c +++ b/platforms/ibm-fsp/zz.c @@ -30,20 +30,24 @@ /* We don't yet create NPU device nodes on ZZ, but these values are correct */ const struct platform_ocapi zz_ocapi = { - .i2c_engine = 1, - .i2c_port = 4, - .i2c_reset_addr = 0x20, - .i2c_reset_odl0 = (1 << 1), - .i2c_reset_odl1 = (1 << 6), - .i2c_presence_addr = 0x20, - .i2c_presence_odl0 = (1 << 2), /* bottom connector */ - .i2c_presence_odl1 = (1 << 7), /* top connector */ + .i2c_engine = 1, + .i2c_port = 4, + .i2c_reset_addr = 0x20, + .i2c_reset_brick2 = (1 << 1), + .i2c_reset_brick3 = (1 << 6), + .i2c_reset_brick4 = 0, /* unused */ + .i2c_reset_brick5 = 0, /* unused */ + .i2c_presence_addr = 0x20, + .i2c_presence_brick2 = (1 << 2), /* bottom connector */ + .i2c_presence_brick3 = (1 << 7), /* top connector */ + .i2c_presence_brick4 = 0, /* unused */ + .i2c_presence_brick5 = 0, /* unused */ /* * i2c presence detection is broken on ZZ planar < v4 so we * force the presence until all our systems are upgraded */ - .force_presence = true, - .odl_phy_swap = true, + .force_presence = true, + .odl_phy_swap = true, }; static bool zz_probe(void)