From patchwork Sat Aug 7 04:20:54 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1514563 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.ozlabs.org (client-ip=112.213.38.117; helo=lists.ozlabs.org; envelope-from=skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=Rb+A+Hd1; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [112.213.38.117]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GhTgk47tjz9sCD for ; Sat, 7 Aug 2021 14:21:38 +1000 (AEST) Received: from boromir.ozlabs.org (localhost [IPv6:::1]) by lists.ozlabs.org (Postfix) with ESMTP id 4GhTgk3CgSz3dCq for ; Sat, 7 Aug 2021 14:21:38 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=Rb+A+Hd1; dkim-atps=neutral X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::631; helo=mail-pl1-x631.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256 header.s=20161025 header.b=Rb+A+Hd1; dkim-atps=neutral Received: from mail-pl1-x631.google.com (mail-pl1-x631.google.com [IPv6:2607:f8b0:4864:20::631]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 4GhTgR4z7zz3dB9 for ; Sat, 7 Aug 2021 14:21:23 +1000 (AEST) Received: by mail-pl1-x631.google.com with SMTP id bh7so1010615plb.5 for ; Fri, 06 Aug 2021 21:21:23 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=bq1q9qa5U93tmBGOQ1FSNWwniUzi76U1mlgJ1+GKTCU=; b=Rb+A+Hd1fcstjdyQexTEE263EUwOxKhjGfWwm0rRi4wx9OOiPDD87qEgrkm2mwrZl4 YJkcqGEMQ3LOgIe3TyCxdNDtinwhUDdJTChNx7SBK/vZHLgsX9mDrsCghbnVfAkRWNYB YoBwAzGSp3EqYXBEIJ2o5bw9psiZi43L83tV+H/WTS+A9sdUAQxIjaeNgkv3MxkWC/C9 SzObQUoNRwg3fu2xNygvwKnOPHOSD5q0DDgJKVDjZ3lDN/Ux6uk+GUsGZYFOB9n5vGHu 7N0+xNhugqc+uRM9/tNcqAp7NzvjTiVIq+P5G5YnNAnOT0WmVOLA0Zgq/ZvDtzsfMfpZ axqQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=bq1q9qa5U93tmBGOQ1FSNWwniUzi76U1mlgJ1+GKTCU=; b=Fom1DHbXYtkE6NFqzon0SfKiD1tvs9g4/ClXC3qN5Ch9o1gax+g5inx4xGFI43iNg2 3RVo+27+mFKbRX+O8BlhVH9NSPwGDE2y2C6v4/KUeLJkhxT1DYqilXO1LvjQrIi+dYj2 AKMNdZWknKSBt0CVcLIuTn/82shS0rFSBIILlEHD6JIVpOf4LvV1GV5kI5o75Zxp8JpC oAOcO/M8G6UdK3K1Va3M3OprTqyL/vliSLyJEEiqJnhSxrlDDpX2aszraraJ76mqUhm3 P6RVCOuNE7Em3x/IAATxQLbPLe10eHa9+ZE7n681VB7Gb0p73oD38UJ18FzoVfoFZdWY jpdg== X-Gm-Message-State: AOAM5312DTICG3UdngNnWQpJwO8MeD98p96QUAIUXqAC8L9DurVUgLnV MQcZsIJJu+ijA+i4SUfHeUUpg0IBVdk= X-Google-Smtp-Source: ABdhPJzjp+zR6TF16OSLwY7Lw1fe6Wh+Ku28EekzcmWegtwHYuSlOoIMeneWYRvGZnsL+tuUZAEw+g== X-Received: by 2002:a63:1460:: with SMTP id 32mr471540pgu.323.1628310081045; Fri, 06 Aug 2021 21:21:21 -0700 (PDT) Received: from bobo.ozlabs.ibm.com ([118.210.97.79]) by smtp.gmail.com with ESMTPSA id x25sm12086574pfq.28.2021.08.06.21.21.18 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 06 Aug 2021 21:21:20 -0700 (PDT) From: Nicholas Piggin To: skiboot@lists.ozlabs.org Date: Sat, 7 Aug 2021 14:20:54 +1000 Message-Id: <20210807042100.399449-5-npiggin@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20210807042100.399449-1-npiggin@gmail.com> References: <20210807042100.399449-1-npiggin@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH v2 04/10] Add CONFIG_P8 with PHB3 behind it X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Stewart Smith We can use a base CPU of POWER9 if we don't have P8. We can also hide PHB3 code behind this, and shave 12kb off skiboot.lid.xz [npiggin: add cpp define, fail gracefully on P8] Signed-off-by: Stewart Smith --- Makefile | 2 ++ Makefile.main | 15 ++++++++++++++- core/cpu.c | 11 +++++++++-- hw/Makefile.inc | 8 ++++++-- 4 files changed, 31 insertions(+), 5 deletions(-) diff --git a/Makefile b/Makefile index 6e5b91d84..a9807c4dc 100644 --- a/Makefile +++ b/Makefile @@ -65,6 +65,8 @@ ELF_ABI_v2 ?= $(LITTLE_ENDIAN) DEAD_CODE_ELIMINATION ?= 0 # Try to build without FSP code CONFIG_FSP?=1 +# Try to build without POWER8 support +CONFIG_P8?=1 # # Where is the source directory, must be a full path (no ~) diff --git a/Makefile.main b/Makefile.main index c8a63e8b1..2a346a6c9 100644 --- a/Makefile.main +++ b/Makefile.main @@ -96,7 +96,11 @@ CPPFLAGS += -DDEBUG -DCCAN_LIST_DEBUG endif CFLAGS := -fno-strict-aliasing -pie -fpie -fno-pic -m64 -fno-asynchronous-unwind-tables +ifeq ($(CONFIG_P8),1) CFLAGS += -mcpu=power8 +else +CFLAGS += -mcpu=power9 +endif CFLAGS += -Wl,--oformat,elf64-powerpc -ggdb # r13,r14,r15 are preserved for OS to use as fixed registers. # These could be saved and restored in and out of skiboot, but it's more @@ -156,6 +160,10 @@ else CFLAGS += -fno-stack-protector endif +# Add preprocessor defines for CONFIG_ options here +ifeq ($(CONFIG_P8),1) +CFLAGS += -DCONFIG_P8=1 +endif CFLAGS += $(call try-cflag,$(CC),-Wjump-misses-init) \ $(call try-cflag,$(CC),-Wsuggest-attribute=const) \ @@ -173,7 +181,12 @@ LDFLAGS := -m64 -static -nostdlib -pie LDFLAGS += -Wl,-pie LDFLAGS += -Wl,-Ttext-segment,$(LD_TEXT) -Wl,-N -Wl,--build-id=none LDFLAGS += -Wl,--no-multi-toc -LDFLAGS += -mcpu=power8 -Wl,--oformat,elf64-powerpc +ifeq ($(CONFIG_P8),1) +LDFLAGS += -mcpu=power8 +else +LDFLAGS += -mcpu=power9 +endif +LDFLAGS += -Wl,--oformat,elf64-powerpc LDFLAGS_FINAL = -m elf64lppc --no-multi-toc -N --build-id=none --whole-archive LDFLAGS_FINAL += -static -nostdlib -pie -Ttext-segment=$(LD_TEXT) --oformat=elf64-powerpc LDFLAGS_FINAL += --orphan-handling=warn diff --git a/core/cpu.c b/core/cpu.c index 60a9ea1c3..d4d33b836 100644 --- a/core/cpu.c +++ b/core/cpu.c @@ -1051,9 +1051,16 @@ void init_boot_cpu(void) cpu_thread_count = 1; } - if (proc_gen == proc_gen_p8 && (PVR_VERS_MAJ(mfspr(SPR_PVR)) == 1)) { - prerror("CPU: POWER8 DD1 is not supported\n"); + if (proc_gen == proc_gen_p8) { +#ifdef CONFIG_P8 + if (PVR_VERS_MAJ(mfspr(SPR_PVR)) == 1) { + prerror("CPU: POWER8 DD1 is not supported\n"); + abort(); + } +#else + prerror("CPU: POWER8 detected but CONFIG_P8 not set\n"); abort(); +#endif } if (is_power9n(pvr) && (PVR_VERS_MAJ(pvr) == 1)) { diff --git a/hw/Makefile.inc b/hw/Makefile.inc index 37256d3cc..d436da222 100644 --- a/hw/Makefile.inc +++ b/hw/Makefile.inc @@ -3,13 +3,17 @@ SUBDIRS += hw HW_OBJS = xscom.o chiptod.o lpc.o lpc-uart.o psi.o HW_OBJS += homer.o slw.o occ.o fsi-master.o centaur.o imc.o HW_OBJS += nx.o nx-rng.o nx-crypto.o nx-compress.o nx-842.o nx-gzip.o -HW_OBJS += phb3.o sfc-ctrl.o fake-rtc.o bt.o p8-i2c.o prd.o -HW_OBJS += dts.o lpc-rtc.o npu.o npu-hw-procedures.o xive.o phb4.o +HW_OBJS += sfc-ctrl.o fake-rtc.o bt.o p8-i2c.o prd.o +HW_OBJS += dts.o lpc-rtc.o xive.o phb4.o HW_OBJS += fake-nvram.o lpc-mbox.o npu2.o npu2-hw-procedures.o HW_OBJS += npu2-common.o npu2-opencapi.o phys-map.o sbe-p9.o capp.o HW_OBJS += occ-sensor.o vas.o sbe-p8.o dio-p9.o lpc-port80h.o cache-p9.o HW_OBJS += npu-opal.o npu3.o npu3-nvlink.o npu3-hw-procedures.o HW_OBJS += ocmb.o xive2.o +HW_OBJS += npu.o npu-hw-procedures.o +ifeq ($(CONFIG_P8),1) +HW_OBJS += phb3.o +endif HW=hw/built-in.a include $(SRC)/hw/fsp/Makefile.inc