Message ID | 20210804072137.1147875-4-hegdevasant@linux.vnet.ibm.com |
---|---|
State | Accepted |
Headers | show
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Wed, 4 Aug 2021 07:19:09 GMT Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 17F29AE059; Wed, 4 Aug 2021 07:22:07 +0000 (GMT) Received: from d06av26.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C4B54AE045; Wed, 4 Aug 2021 07:22:05 +0000 (GMT) Received: from hegdevasant.in.ibm.com (unknown [9.85.83.73]) by d06av26.portsmouth.uk.ibm.com (Postfix) with ESMTP; Wed, 4 Aug 2021 07:22:05 +0000 (GMT) From: Vasant Hegde <hegdevasant@linux.vnet.ibm.com> To: skiboot@lists.ozlabs.org Date: Wed, 4 Aug 2021 12:50:41 +0530 Message-Id: <20210804072137.1147875-4-hegdevasant@linux.vnet.ibm.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210804072137.1147875-1-hegdevasant@linux.vnet.ibm.com> References: <20210804072137.1147875-1-hegdevasant@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 X-Proofpoint-ORIG-GUID: 0ukycPwLXdfeq7JLDMnuVGGStuM2MFkm X-Proofpoint-GUID: mziiOzQDmY1gai_FvS1mUmtURjwzzhGk X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.391, 18.0.790 definitions=2021-08-04_02:2021-08-03, 2021-08-04 signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 mlxscore=0 malwarescore=0 clxscore=1015 mlxlogscore=705 phishscore=0 adultscore=0 impostorscore=0 bulkscore=0 lowpriorityscore=0 priorityscore=1501 spamscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.12.0-2107140000 definitions=main-2108040036 Subject: [Skiboot] [PATCH v2 03/59] hw/p8-i2c: Add POWER10 support X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development <skiboot.lists.ozlabs.org> List-Unsubscribe: <https://lists.ozlabs.org/options/skiboot>, <mailto:skiboot-request@lists.ozlabs.org?subject=unsubscribe> List-Archive: <http://lists.ozlabs.org/pipermail/skiboot/> List-Post: <mailto:skiboot@lists.ozlabs.org> List-Help: <mailto:skiboot-request@lists.ozlabs.org?subject=help> List-Subscribe: <https://lists.ozlabs.org/listinfo/skiboot>, <mailto:skiboot-request@lists.ozlabs.org?subject=subscribe> Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" <skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org> |
Series |
P10 Enablement
|
expand
|
diff --git a/hw/p8-i2c.c b/hw/p8-i2c.c index 6e24c3e82..45815858e 100644 --- a/hw/p8-i2c.c +++ b/hw/p8-i2c.c @@ -315,21 +315,15 @@ static bool p8_i2c_has_irqs(struct p8_i2c_master *master) * DD2.0. When operating without interrupts, we need to bump the * timeouts as we rely solely on the polls from Linux which can * be up to 2s apart ! - * - * Also we don't have interrupts for the Centaur i2c. */ - switch (chip->type) { - case PROC_CHIP_P8_MURANO: + if (proc_gen >= proc_gen_p9) + return true; + else if (chip->type == PROC_CHIP_P8_MURANO) return chip->ec_level >= 0x21; - case PROC_CHIP_P8_VENICE: + else if (chip->type == PROC_CHIP_P8_VENICE) return chip->ec_level >= 0x20; - case PROC_CHIP_P8_NAPLES: - case PROC_CHIP_P9_NIMBUS: - case PROC_CHIP_P9_CUMULUS: - return true; - default: - return false; - } + + return true; } static int p8_i2c_enable_irqs(struct p8_i2c_master *master) @@ -928,8 +922,8 @@ static int p8_i2c_check_initial_status(struct p8_i2c_master_port *port) */ static bool occ_uses_master(struct p8_i2c_master *master) { - /* OCC uses I2CM Engines 1,2 and 3, only on POWER9 */ - if (master->type == I2C_POWER8 && proc_gen == proc_gen_p9) + /* OCC uses I2CM Engines 1,2 and 3, only on POWER9/10 */ + if (master->type == I2C_POWER8 && proc_gen >= proc_gen_p9) return master->engine_id >= 1; return false; @@ -1591,7 +1585,12 @@ void p8_i2c_init(void) int i; /* setup the handshake reg */ - occflg = 0x6C08A; + if (proc_gen <= proc_gen_p9) + occflg = 0x6C08A; + else if (proc_gen == proc_gen_p10) + occflg = 0x6C0AC; + else + return; prlog(PR_INFO, "I2C: OCC flag reg: %x\n", occflg);