diff mbox series

[1/2] hw/phb4: Actually enable error reporting

Message ID 20200828043055.1563069-1-oohall@gmail.com
State Accepted
Headers show
Series [1/2] hw/phb4: Actually enable error reporting | expand

Checks

Context Check Description
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot-dco success Signed-off-by present
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot success Test snowpatch/job/snowpatch-skiboot on branch master
snowpatch_ozlabs/apply_patch success Successfully applied on branch master (abe4c4799ffee4be12674ad59fc0bc521b0724f3)

Commit Message

Oliver O'Halloran Aug. 28, 2020, 4:30 a.m. UTC
PHB3 had an errata about correctable errors and when Ben was doing the
initial PHB4 port he deleted the corresponding config write to DEVCTL.

Whoops.

Cc: skiboot-stable@lists.ozlabs.org
Signed-off-by: Oliver O'Halloran <oohall@gmail.com>
---
 hw/phb4.c | 1 +
 1 file changed, 1 insertion(+)
diff mbox series

Patch

diff --git a/hw/phb4.c b/hw/phb4.c
index 3f22a2c4d98f..328621917667 100644
--- a/hw/phb4.c
+++ b/hw/phb4.c
@@ -785,6 +785,7 @@  static void phb4_endpoint_init(struct phb *phb,
 	val16 |= (PCICAP_EXP_DEVCTL_NFE_REPORT |
 		  PCICAP_EXP_DEVCTL_FE_REPORT |
 		  PCICAP_EXP_DEVCTL_UR_REPORT);
+	pci_cfg_write16(phb, bdfn, ecap + PCICAP_EXP_DEVCTL, val16);
 
 	/* Enable ECRC generation and check */
 	pci_cfg_read32(phb, bdfn, aercap + PCIECAP_AER_CAPCTL, &val32);