diff mbox series

[v8,05/11] xscoms: read/write xscoms using ucall

Message ID 20200826183749.143980-6-grimm@linux.ibm.com
State Changes Requested
Headers show
Series Ultravisor support in skiboot | expand

Checks

Context Check Description
snowpatch_ozlabs/apply_patch success Successfully applied on branch master (abe4c4799ffee4be12674ad59fc0bc521b0724f3)
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot success Test snowpatch/job/snowpatch-skiboot on branch master
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot-dco success Signed-off-by present

Commit Message

Ryan Grimm Aug. 26, 2020, 6:37 p.m. UTC
From: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>

xscom registers are in the secure memory area when secure mode is
enabled. These registers cannot be accessed directly and need to use
ultravisor services using ultracall.

Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
Signed-off-by: Santosh Sivaraj <santosh@fossix.org>
[ linuxram: Set uv_present just after starting UV ]
Signed-off-by: Ram Pai <linuxram@us.ibm.com>
[ grimm: Don't check MSR in xscom read/write ]
Signed-off-by: Ryan Grimm <grimm@linux.ibm.com>
---
 include/ultravisor.h | 21 +++++++++++++++++++++
 include/xscom.h      |  5 +++++
 2 files changed, 26 insertions(+)

Comments

Oliver O'Halloran Aug. 28, 2020, 4:50 a.m. UTC | #1
On Thu, Aug 27, 2020 at 4:41 AM Ryan Grimm <grimm@linux.ibm.com> wrote:
>
> From: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
>
> xscom registers are in the secure memory area when secure mode is
> enabled. These registers cannot be accessed directly and need to use
> ultravisor services using ultracall.
>
> Signed-off-by: Madhavan Srinivasan <maddy@linux.vnet.ibm.com>
> Signed-off-by: Santosh Sivaraj <santosh@fossix.org>
> [ linuxram: Set uv_present just after starting UV ]
> Signed-off-by: Ram Pai <linuxram@us.ibm.com>
> [ grimm: Don't check MSR in xscom read/write ]
> Signed-off-by: Ryan Grimm <grimm@linux.ibm.com>
> ---
>  include/ultravisor.h | 21 +++++++++++++++++++++
>  include/xscom.h      |  5 +++++
>  2 files changed, 26 insertions(+)
>
> diff --git a/include/ultravisor.h b/include/ultravisor.h
> index 623b81d4..84217d66 100644
> --- a/include/ultravisor.h
> +++ b/include/ultravisor.h
> @@ -7,6 +7,7 @@
>  #include <stdbool.h>
>  #include <stdint.h>
>  #include <types.h>
> +#include <processor.h>
>
>  /*
>   * enter_uv: Each thread enters ultravisor and exits with S=0
> @@ -43,4 +44,24 @@ void init_uv(void);
>  #define UCALL_BUFSIZE 4
>  extern long ucall(unsigned long opcode, unsigned long *retbuf, ...);
>
> +#define UV_READ_SCOM  0xF114
> +#define UV_WRITE_SCOM 0xF118
> +
> +static inline int uv_xscom_read(u64 partid, u64 pcb_addr, u64 *val)
> +{
> +       unsigned long retbuf[UCALL_BUFSIZE];
> +       long rc;
> +
> +       rc = ucall(UV_READ_SCOM, retbuf, partid, pcb_addr);
> +       *val = retbuf[0];
> +       return rc;
> +}
> +
> +static inline int uv_xscom_write(u64 partid, u64 pcb_addr, u64 val)
> +{
> +       unsigned long retbuf[UCALL_BUFSIZE];
> +
> +       return ucall(UV_WRITE_SCOM, retbuf, partid, pcb_addr, val);
> +}
> +
>  #endif /* __ULTRAVISOR_H */
> diff --git a/include/xscom.h b/include/xscom.h
> index bd8bb89a..67a845fd 100644
> --- a/include/xscom.h
> +++ b/include/xscom.h
> @@ -7,6 +7,7 @@
>  #include <stdint.h>
>  #include <processor.h>
>  #include <cpu.h>
> +#include <ultravisor.h>
>
>  /*
>   * SCOM "partID" definitions:
> @@ -174,9 +175,13 @@ extern void _xscom_unlock(void);
>  /* Targeted SCOM access */
>  static inline int xscom_read(uint32_t partid, uint64_t pcb_addr, uint64_t *val)
>  {
> +       if (uv_present)
> +               return uv_xscom_read(partid, pcb_addr, val);
>         return _xscom_read(partid, pcb_addr, val, true);
>  }
>  static inline int xscom_write(uint32_t partid, uint64_t pcb_addr, uint64_t val) {
> +       if (uv_present)
> +               return uv_xscom_write(partid, pcb_addr, val);
>         return _xscom_write(partid, pcb_addr, val, true);
>  }

This should probably go into __xscom_write() since it'll break
emulated scoms that we use for the OCMBs addresses on swift and P10.
The UV would also need to support that, but I have some patches to use
the xscom API to access other register spaces (e.g. PHB IODA tables)
which this would also break.

>  extern int xscom_write_mask(uint32_t partid, uint64_t pcb_addr, uint64_t val, uint64_t mask);
> --
> 2.18.4
>
> _______________________________________________
> Skiboot mailing list
> Skiboot@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/skiboot
Ryan Grimm Sept. 8, 2020, 8:12 p.m. UTC | #2
On Fri, 2020-08-28 at 14:50 +1000, Oliver O'Halloran wrote:
> > diff --git a/include/xscom.h b/include/xscom.h
> > index bd8bb89a..67a845fd 100644
> > --- a/include/xscom.h
> > +++ b/include/xscom.h
> > @@ -7,6 +7,7 @@
> >  #include <stdint.h>
> >  #include <processor.h>
> >  #include <cpu.h>
> > +#include <ultravisor.h>
> > 
> >  /*
> >   * SCOM "partID" definitions:
> > @@ -174,9 +175,13 @@ extern void _xscom_unlock(void);
> >  /* Targeted SCOM access */
> >  static inline int xscom_read(uint32_t partid, uint64_t pcb_addr,
> > uint64_t *val)
> >  {
> > +       if (uv_present)
> > +               return uv_xscom_read(partid, pcb_addr, val);
> >         return _xscom_read(partid, pcb_addr, val, true);
> >  }
> >  static inline int xscom_write(uint32_t partid, uint64_t pcb_addr,
> > uint64_t val) {
> > +       if (uv_present)
> > +               return uv_xscom_write(partid, pcb_addr, val);
> >         return _xscom_write(partid, pcb_addr, val, true);
> >  }
> 
> This should probably go into __xscom_write() since it'll break
> emulated scoms that we use for the OCMBs addresses on swift and P10.
> The UV would also need to support that, but I have some patches to
> use
> the xscom API to access other register spaces (e.g. PHB IODA tables)
> which this would also break.
> 

Does the attached patch look OK?  I stuck it in the __xscom functions
after the function checks the gcid.

-Ryan

> > 
> > 
> > _______________________________________________
> > Skiboot mailing list
> > Skiboot@lists.ozlabs.org
> > https://lists.ozlabs.org/listinfo/skiboot
diff mbox series

Patch

diff --git a/include/ultravisor.h b/include/ultravisor.h
index 623b81d4..84217d66 100644
--- a/include/ultravisor.h
+++ b/include/ultravisor.h
@@ -7,6 +7,7 @@ 
 #include <stdbool.h>
 #include <stdint.h>
 #include <types.h>
+#include <processor.h>
 
 /*
  * enter_uv: Each thread enters ultravisor and exits with S=0
@@ -43,4 +44,24 @@  void init_uv(void);
 #define UCALL_BUFSIZE 4
 extern long ucall(unsigned long opcode, unsigned long *retbuf, ...);
 
+#define UV_READ_SCOM  0xF114
+#define UV_WRITE_SCOM 0xF118
+
+static inline int uv_xscom_read(u64 partid, u64 pcb_addr, u64 *val)
+{
+	unsigned long retbuf[UCALL_BUFSIZE];
+	long rc;
+
+	rc = ucall(UV_READ_SCOM, retbuf, partid, pcb_addr);
+	*val = retbuf[0];
+	return rc;
+}
+
+static inline int uv_xscom_write(u64 partid, u64 pcb_addr, u64 val)
+{
+	unsigned long retbuf[UCALL_BUFSIZE];
+
+	return ucall(UV_WRITE_SCOM, retbuf, partid, pcb_addr, val);
+}
+
 #endif /* __ULTRAVISOR_H */
diff --git a/include/xscom.h b/include/xscom.h
index bd8bb89a..67a845fd 100644
--- a/include/xscom.h
+++ b/include/xscom.h
@@ -7,6 +7,7 @@ 
 #include <stdint.h>
 #include <processor.h>
 #include <cpu.h>
+#include <ultravisor.h>
 
 /*
  * SCOM "partID" definitions:
@@ -174,9 +175,13 @@  extern void _xscom_unlock(void);
 /* Targeted SCOM access */
 static inline int xscom_read(uint32_t partid, uint64_t pcb_addr, uint64_t *val)
 {
+	if (uv_present)
+		return uv_xscom_read(partid, pcb_addr, val);
 	return _xscom_read(partid, pcb_addr, val, true);
 }
 static inline int xscom_write(uint32_t partid, uint64_t pcb_addr, uint64_t val) {
+	if (uv_present)
+		return uv_xscom_write(partid, pcb_addr, val);
 	return _xscom_write(partid, pcb_addr, val, true);
 }
 extern int xscom_write_mask(uint32_t partid, uint64_t pcb_addr, uint64_t val, uint64_t mask);