From patchwork Fri Jun 12 11:37:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 1308148 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 49k12G2jBNz9sT9 for ; Fri, 12 Jun 2020 22:56:38 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 49k12G1ScjzDqvt for ; Fri, 12 Jun 2020 22:56:38 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=kaod.org (client-ip=46.105.72.44; helo=9.mo173.mail-out.ovh.net; envelope-from=clg@kaod.org; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org X-Greylist: delayed 2397 seconds by postgrey-1.36 at bilbo; Fri, 12 Jun 2020 22:56:29 AEST Received: from 9.mo173.mail-out.ovh.net (9.mo173.mail-out.ovh.net [46.105.72.44]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 49k1254Jk8zDqvY for ; Fri, 12 Jun 2020 22:56:29 +1000 (AEST) Received: from player771.ha.ovh.net (unknown [10.110.171.227]) by mo173.mail-out.ovh.net (Postfix) with ESMTP id ACB021430DF for ; Fri, 12 Jun 2020 13:38:27 +0200 (CEST) Received: from kaod.org (82-64-250-170.subs.proxad.net [82.64.250.170]) (Authenticated sender: clg@kaod.org) by player771.ha.ovh.net (Postfix) with ESMTPSA id BA2C71363DBD8; Fri, 12 Jun 2020 11:38:21 +0000 (UTC) Authentication-Results: garm.ovh; auth=pass (GARM-97G0027ecb9515-6bb2-4a67-8d4e-25a3aeb55972,EB3F143BCCF81B35F467F76D3EA0524591534A17) smtp.auth=clg@kaod.org From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: skiboot@lists.ozlabs.org Date: Fri, 12 Jun 2020 13:37:31 +0200 Message-Id: <20200612113732.374240-11-clg@kaod.org> X-Mailer: git-send-email 2.25.4 In-Reply-To: <20200612113732.374240-1-clg@kaod.org> References: <20200612113732.374240-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 7580402598732139481 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgeduhedrudeiuddggeehucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecuhedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhephffvufffkffojghfgggtgfesthekredtredtjeenucfhrhhomhepveorughrihgtucfnvgcuifhorghtvghruceotghlgheskhgrohgurdhorhhgqeenucggtffrrghtthgvrhhnpefgieetvdefudeghedvveejudeihfeiteffjeetjeeukefhgffgvedugedugedugfenucfkpheptddrtddrtddrtddpkedvrdeigedrvdehtddrudejtdenucevlhhushhtvghrufhiiigvpedtnecurfgrrhgrmhepmhhouggvpehsmhhtphdqohhuthdphhgvlhhopehplhgrhigvrhejjedurdhhrgdrohhvhhdrnhgvthdpihhnvghtpedtrddtrddtrddtpdhmrghilhhfrhhomheptghlgheskhgrohgurdhorhhgpdhrtghpthhtohepshhkihgsohhotheslhhishhtshdrohiilhgrsghsrdhorhhg Subject: [Skiboot] [PATCH v2 10/11] xive/p9: Modify the size of the VP space X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The VP space is 19bits wide but the number of XIVE VPs software can use depends on the configured number of EQs. We have 1M EQs and we use 8 priorities per VP. Therefore, our VP space is limited to 128k. Signed-off-by: Cédric Le Goater --- hw/xive.c | 20 ++++++++++++-------- 1 file changed, 12 insertions(+), 8 deletions(-) diff --git a/hw/xive.c b/hw/xive.c index 960f74d9e708..ccdb20bdbe45 100644 --- a/hw/xive.c +++ b/hw/xive.c @@ -201,15 +201,19 @@ * we will allocate half of the above. We might add support for * 2 blocks per chip later if necessary. * - * XXX Adjust that based on BAR value ? + * TODO: adjust the PC BAR range */ #define VP_PER_PAGE (0x10000 / sizeof(struct xive_vp)) #define NVT_SHIFT 19 /* in sync with EQ_W6_NVT_INDEX */ -#define MAX_VP_ORDER NVT_SHIFT /* 512k */ -#define MAX_VP_COUNT (1ul << MAX_VP_ORDER) -#define XIVE_VP_TABLE_SIZE ((MAX_VP_COUNT / VP_PER_PAGE) * XIVE_VSD_SIZE) +/* + * We use 8 priorities per VP and the number of EQs is configured to + * 1M. Therefore, our VP space is limited to 128k. + */ +#define XIVE_VP_ORDER (XIVE_EQ_ORDER - 3) /* 128k */ +#define XIVE_VP_COUNT (1ul << XIVE_VP_ORDER) +#define XIVE_VP_TABLE_SIZE ((XIVE_VP_COUNT / VP_PER_PAGE) * XIVE_VSD_SIZE) /* Initial number of VPs (XXX Make it a variable ?). Round things * up to a max of 32 cores per chip @@ -385,7 +389,7 @@ struct xive { * table (ie, pages of pointers) and populate enough of the pages * for our basic setup using 64K pages. * - * The size of the indirect tables are driven by MAX_VP_COUNT and + * The size of the indirect tables are driven by XIVE_VP_COUNT and * XIVE_EQ_COUNT. The number of pre-allocated ones are driven by * INITIAL_VP_COUNT (number of EQ depends on number of VP) in block * mode, otherwise we only preallocate INITIAL_BLK0_VP_COUNT on @@ -971,12 +975,12 @@ static void xive_init_vp_allocator(void) prlog(PR_INFO, "XIVE: %d chips considered for VP allocations\n", 1 << xive_chips_alloc_bits); - /* Allocate a buddy big enough for MAX_VP_ORDER allocations. + /* Allocate a buddy big enough for XIVE_VP_ORDER allocations. * * each bit in the buddy represents 1 << xive_chips_alloc_bits * VPs. */ - xive_vp_buddy = buddy_create(MAX_VP_ORDER); + xive_vp_buddy = buddy_create(XIVE_VP_ORDER); assert(xive_vp_buddy); /* We reserve the whole range of VPs representing HW chips. @@ -4470,7 +4474,7 @@ static void xive_reset_one(struct xive *x) * either keep a bitmap of allocated VPs or add an iterator to * the buddy which is trickier but doable. */ - for (i = 0; i < MAX_VP_COUNT; i++) { + for (i = 0; i < XIVE_VP_COUNT; i++) { struct xive_vp *vp; struct xive_vp vp0 = {0};