Message ID | 20200604132126.750999-7-clg@kaod.org |
---|---|
State | Superseded |
Headers | show |
Series | xive/p9: various small cleanups | expand |
Context | Check | Description |
---|---|---|
snowpatch_ozlabs/apply_patch | warning | Failed to apply on branch master (6bf21350da32776aac8ba75bf48933854647bd7e) |
snowpatch_ozlabs/apply_patch | fail | Failed to apply to any branch |
On 6/4/20 10:21 AM, Cédric Le Goater wrote: > Each EQ descriptor is associated with a pair of ESB pages. The even > page controls the ESn PQ bits and the odd page controls the ESe PQ > bits. > > Signed-off-by: Cédric Le Goater <clg@kaod.org> > --- > hw/xive.c | 5 +++-- > 1 file changed, 3 insertions(+), 2 deletions(-) > > diff --git a/hw/xive.c b/hw/xive.c > index 4a029c3e97db..3fce079d2721 100644 > --- a/hw/xive.c > +++ b/hw/xive.c > @@ -100,7 +100,6 @@ > /* Use 64K for everything by default */ > #define IC_PAGE_SIZE 0x10000 > #define TM_PAGE_SIZE 0x10000 > -#define EQ_ESB_SHIFT (16 + 1) > > /* VC BAR contains set translations for the ESBs and the EQs. > * > @@ -180,6 +179,8 @@ > #define EQ_PER_PAGE (0x10000 / 32) // Use sizeof ? > #define IND_EQ_TABLE_SIZE ((XIVE_EQ_COUNT / EQ_PER_PAGE) * 8) > > +#define XIVE_EQ_SHIFT (16 + 1) /* ESn + ESe pages */ > + > /* Number of priorities (and thus EQDs) we allocate for each VP */ > #define NUM_INT_PRIORITIES 8 > > @@ -2672,7 +2673,7 @@ static struct xive *init_one_xive(struct dt_node *np) > /* Register escalation sources */ > __xive_register_source(x, &x->esc_irqs, > MAKE_ESCALATION_GIRQ(x->block_id, 0), > - XIVE_EQ_COUNT, EQ_ESB_SHIFT, > + XIVE_EQ_COUNT, XIVE_EQ_SHIFT, > x->eq_mmio, XIVE_SRC_EOI_PAGE1, > false, NULL, NULL); Reviewed-by: Gustavo Romero <gromero@linux.ibm.com> Best regards, Gustavo
diff --git a/hw/xive.c b/hw/xive.c index 4a029c3e97db..3fce079d2721 100644 --- a/hw/xive.c +++ b/hw/xive.c @@ -100,7 +100,6 @@ /* Use 64K for everything by default */ #define IC_PAGE_SIZE 0x10000 #define TM_PAGE_SIZE 0x10000 -#define EQ_ESB_SHIFT (16 + 1) /* VC BAR contains set translations for the ESBs and the EQs. * @@ -180,6 +179,8 @@ #define EQ_PER_PAGE (0x10000 / 32) // Use sizeof ? #define IND_EQ_TABLE_SIZE ((XIVE_EQ_COUNT / EQ_PER_PAGE) * 8) +#define XIVE_EQ_SHIFT (16 + 1) /* ESn + ESe pages */ + /* Number of priorities (and thus EQDs) we allocate for each VP */ #define NUM_INT_PRIORITIES 8 @@ -2672,7 +2673,7 @@ static struct xive *init_one_xive(struct dt_node *np) /* Register escalation sources */ __xive_register_source(x, &x->esc_irqs, MAKE_ESCALATION_GIRQ(x->block_id, 0), - XIVE_EQ_COUNT, EQ_ESB_SHIFT, + XIVE_EQ_COUNT, XIVE_EQ_SHIFT, x->eq_mmio, XIVE_SRC_EOI_PAGE1, false, NULL, NULL);
Each EQ descriptor is associated with a pair of ESB pages. The even page controls the ESn PQ bits and the odd page controls the ESe PQ bits. Signed-off-by: Cédric Le Goater <clg@kaod.org> --- hw/xive.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-)