From patchwork Sun Dec 8 12:22:45 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nicholas Piggin X-Patchwork-Id: 1205618 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47W5D333ZQz9sP3 for ; Sun, 8 Dec 2019 23:26:43 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="sHi4BVJH"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 47W5D30pjZzDqGS for ; Sun, 8 Dec 2019 23:26:43 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::432; helo=mail-pf1-x432.google.com; envelope-from=npiggin@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="sHi4BVJH"; dkim-atps=neutral Received: from mail-pf1-x432.google.com (mail-pf1-x432.google.com [IPv6:2607:f8b0:4864:20::432]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 47W58M73klzDqDV for ; Sun, 8 Dec 2019 23:23:31 +1100 (AEDT) Received: by mail-pf1-x432.google.com with SMTP id s18so5744610pfd.8 for ; Sun, 08 Dec 2019 04:23:31 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=21xJy6qGS4RUbS6wrAsGdINkbfr2KVe2D3EuCs4cJO0=; b=sHi4BVJH8eqi01ybG5nkHpZT8l5DrK1TNfW0ClyDU+NILLdV4g3CJT1td61sslR1aa lSqnz5y0DAgJrnwAD+ObJFyiRypcdYq2WwIcklsWRWFJWQSjDhWpkPXZ/HGsIaCxAkrx dufQdsQgYjCyKQ8z808CgG0Fprhk5z3jT+F09nWK4gq71peLkGq/AXwrWVBhSjr9CAOS gnbaNiw/ONecp/2Ak2oM+o7RJ+xPJl8tGwVq2xz+hUeapxgp5SN8SCK9bSeQg4c1gUWI p2EXzbfWTEQSwJOC+KmCBB8W8j8nwWmtnGnriwOtbfQI0rgIe02Qzc5Uyw4+219gDudl YorQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=21xJy6qGS4RUbS6wrAsGdINkbfr2KVe2D3EuCs4cJO0=; b=J/bszkt79OqlRECvHP5Xu5C6SGcn0nXvE7ukdHfsnssnfC2GkPqZzcQicnekdNyK7x UCvN/WDur2bDsOwhP9k1VZkvosoYWzc0eV9ddatZg8NTa4ZPwfrN7dGkPTxy5x1yyfVt Da3BfYNcfuMp+XZShxkdRj3W3SLbNROBj4eYDGW+a5t74ITppv8bWBVA6pFpZsu8cdTx A6LHX8m0rCP8TDFrWRGyXeuo73U1NkK5S8+t6r0H2++U6yO13WnDigXo87RZUsFPZ4qr 95uM/HvdspFNBfFymKI6skgStCKqwQYUcZinD5SRhyKtdRiVAioArYv8AR5Wigj7uHgB WYQw== X-Gm-Message-State: APjAAAWTBAWKIzoE2IK3bZVRRQUWYZ5Jok7DSKwK8gsMRe+KvEDzb/J7 grF+vaVrTsiCPFcSutJnAhqQkjvG X-Google-Smtp-Source: APXvYqxSaKhy2eK4bab618Tp3B9hynx7dL1yl/NFBkECigzR+G1OGOyn913/D1D8jng5+FDrvrsruw== X-Received: by 2002:a62:8202:: with SMTP id w2mr24918125pfd.100.1575807808100; Sun, 08 Dec 2019 04:23:28 -0800 (PST) Received: from bobo.local0.net ([202.21.15.182]) by smtp.gmail.com with ESMTPSA id i9sm23741866pfk.24.2019.12.08.04.23.25 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 08 Dec 2019 04:23:27 -0800 (PST) From: Nicholas Piggin To: skiboot@lists.ozlabs.org Date: Sun, 8 Dec 2019 22:22:45 +1000 Message-Id: <20191208122312.12837-5-npiggin@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191208122312.12837-1-npiggin@gmail.com> References: <20191208122312.12837-1-npiggin@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH v10 04/31] opal-api: add endian conversions to most opal calls X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" This adds missing endian conversions to most calls, sufficient at least to handle calls from a kernel booting on mambo. Subsystems requiring more extensive changes (e.g., xive) will be done with individual changes. Signed-off-by: Nicholas Piggin Reviewed-by: Vasant Hegde --- core/console.c | 19 ++++--- core/interrupts.c | 8 ++- core/ipmi-opal.c | 6 +-- core/pci-opal.c | 100 +++++++++++++++++++++++++++--------- core/powercap.c | 14 +++-- core/psr.c | 14 +++-- core/sensor.c | 52 +++++++++++-------- hw/dts.c | 12 ++--- hw/fake-rtc.c | 11 ++-- hw/fsp/fsp-console.c | 26 ++++++---- hw/fsp/fsp-rtc.c | 25 +++++---- hw/fsp/fsp-sensor.c | 8 +-- hw/ipmi/ipmi-rtc.c | 11 ++-- hw/lpc-rtc.c | 11 ++-- hw/lpc-uart.c | 16 +++--- hw/lpc.c | 29 +++++++---- hw/npu2-opencapi.c | 12 +++-- hw/occ-sensor.c | 13 +++-- hw/phb4.c | 6 +-- hw/xscom.c | 19 ++++++- include/console.h | 6 +-- include/cpu.h | 2 +- include/dts.h | 2 +- include/fsp.h | 2 +- include/occ.h | 2 +- include/pci.h | 2 +- include/platform.h | 2 +- platforms/ibm-fsp/ibm-fsp.h | 2 +- platforms/mambo/mambo.c | 9 +++- 29 files changed, 290 insertions(+), 151 deletions(-) diff --git a/core/console.c b/core/console.c index 139ba4a97..ac88f0c71 100644 --- a/core/console.c +++ b/core/console.c @@ -351,22 +351,25 @@ void memcons_add_properties(void) * complicated since they can come from the in-memory console (BML) or from the * internal skiboot console driver. */ -static int64_t dummy_console_write(int64_t term_number, int64_t *length, +static int64_t dummy_console_write(int64_t term_number, __be64 *length, const uint8_t *buffer) { + uint64_t l; + if (term_number != 0) return OPAL_PARAMETER; if (!opal_addr_valid(length) || !opal_addr_valid(buffer)) return OPAL_PARAMETER; - write(0, buffer, *length); + l = be64_to_cpu(*length); + write(0, buffer, l); return OPAL_SUCCESS; } static int64_t dummy_console_write_buffer_space(int64_t term_number, - int64_t *length) + __be64 *length) { if (term_number != 0) return OPAL_PARAMETER; @@ -375,21 +378,25 @@ static int64_t dummy_console_write_buffer_space(int64_t term_number, return OPAL_PARAMETER; if (length) - *length = INMEM_CON_OUT_LEN; + *length = cpu_to_be64(INMEM_CON_OUT_LEN); return OPAL_SUCCESS; } -static int64_t dummy_console_read(int64_t term_number, int64_t *length, +static int64_t dummy_console_read(int64_t term_number, __be64 *length, uint8_t *buffer) { + uint64_t l; + if (term_number != 0) return OPAL_PARAMETER; if (!opal_addr_valid(length) || !opal_addr_valid(buffer)) return OPAL_PARAMETER; - *length = read(0, buffer, *length); + l = be64_to_cpu(*length); + l = read(0, buffer, l); + *length = cpu_to_be64(l); opal_update_pending_evt(OPAL_EVENT_CONSOLE_INPUT, 0); return OPAL_SUCCESS; diff --git a/core/interrupts.c b/core/interrupts.c index 10baa15f6..d4a2c3124 100644 --- a/core/interrupts.c +++ b/core/interrupts.c @@ -439,9 +439,11 @@ static int64_t opal_set_xive(uint32_t isn, uint16_t server, uint8_t priority) } opal_call(OPAL_SET_XIVE, opal_set_xive, 3); -static int64_t opal_get_xive(uint32_t isn, uint16_t *server, uint8_t *priority) +static int64_t opal_get_xive(uint32_t isn, __be16 *server, uint8_t *priority) { struct irq_source *is = irq_find_source(isn); + uint16_t s; + int64_t ret; if (!opal_addr_valid(server)) return OPAL_PARAMETER; @@ -449,7 +451,9 @@ static int64_t opal_get_xive(uint32_t isn, uint16_t *server, uint8_t *priority) if (!is || !is->ops->get_xive) return OPAL_PARAMETER; - return is->ops->get_xive(is, isn, server, priority); + ret = is->ops->get_xive(is, isn, &s, priority); + *server = cpu_to_be16(s); + return ret; } opal_call(OPAL_GET_XIVE, opal_get_xive, 3); diff --git a/core/ipmi-opal.c b/core/ipmi-opal.c index 796508ca0..d36962d36 100644 --- a/core/ipmi-opal.c +++ b/core/ipmi-opal.c @@ -57,7 +57,7 @@ static int64_t opal_ipmi_send(uint64_t interface, } static int64_t opal_ipmi_recv(uint64_t interface, - struct opal_ipmi_msg *opal_ipmi_msg, uint64_t *msg_len) + struct opal_ipmi_msg *opal_ipmi_msg, __be64 *msg_len) { struct ipmi_msg *msg; int64_t rc; @@ -82,7 +82,7 @@ static int64_t opal_ipmi_recv(uint64_t interface, goto out_del_msg; } - if (*msg_len - sizeof(struct opal_ipmi_msg) < msg->resp_size + 1) { + if (be64_to_cpu(*msg_len) - sizeof(struct opal_ipmi_msg) < msg->resp_size + 1) { rc = OPAL_RESOURCE; goto out_del_msg; } @@ -101,7 +101,7 @@ static int64_t opal_ipmi_recv(uint64_t interface, msg->cmd, msg->netfn >> 2, msg->resp_size); /* Add one as the completion code is returned in the message data */ - *msg_len = msg->resp_size + sizeof(struct opal_ipmi_msg) + 1; + *msg_len = cpu_to_be64(msg->resp_size + sizeof(struct opal_ipmi_msg) + 1); ipmi_free_msg(msg); return OPAL_SUCCESS; diff --git a/core/pci-opal.c b/core/pci-opal.c index ce8de6325..4dc5237cc 100644 --- a/core/pci-opal.c +++ b/core/pci-opal.c @@ -58,9 +58,38 @@ OPAL_PCICFG_ACCESS_WRITE(write_byte, write8, uint8_t) OPAL_PCICFG_ACCESS_WRITE(write_half_word, write16, uint16_t) OPAL_PCICFG_ACCESS_WRITE(write_word, write32, uint32_t) +static int64_t opal_pci_config_read_half_word_be(uint64_t phb_id, + uint64_t bus_dev_func, + uint64_t offset, + __be16 *__data) +{ + uint16_t data; + int64_t rc; + + rc = opal_pci_config_read_half_word(phb_id, bus_dev_func, offset, &data); + *__data = cpu_to_be16(data); + + return rc; +} + +static int64_t opal_pci_config_read_word_be(uint64_t phb_id, + uint64_t bus_dev_func, + uint64_t offset, + __be32 *__data) +{ + uint32_t data; + int64_t rc; + + rc = opal_pci_config_read_word(phb_id, bus_dev_func, offset, &data); + *__data = cpu_to_be32(data); + + return rc; +} + + opal_call(OPAL_PCI_CONFIG_READ_BYTE, opal_pci_config_read_byte, 4); -opal_call(OPAL_PCI_CONFIG_READ_HALF_WORD, opal_pci_config_read_half_word, 4); -opal_call(OPAL_PCI_CONFIG_READ_WORD, opal_pci_config_read_word, 4); +opal_call(OPAL_PCI_CONFIG_READ_HALF_WORD, opal_pci_config_read_half_word_be, 4); +opal_call(OPAL_PCI_CONFIG_READ_WORD, opal_pci_config_read_word_be, 4); opal_call(OPAL_PCI_CONFIG_WRITE_BYTE, opal_pci_config_write_byte, 4); opal_call(OPAL_PCI_CONFIG_WRITE_HALF_WORD, opal_pci_config_write_half_word, 4); opal_call(OPAL_PCI_CONFIG_WRITE_WORD, opal_pci_config_write_word, 4); @@ -87,14 +116,15 @@ void opal_pci_eeh_clear_evt(uint64_t phb_id) static int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number, uint8_t *freeze_state, - uint16_t *pci_error_type, - uint64_t *phb_status) + __be16 *__pci_error_type, + __be64 *__phb_status) { struct phb *phb = pci_get_phb(phb_id); + uint16_t pci_error_type; int64_t rc; - if (!opal_addr_valid(freeze_state) || !opal_addr_valid(pci_error_type) - || !opal_addr_valid(phb_status)) + if (!opal_addr_valid(freeze_state) || !opal_addr_valid(__pci_error_type) + || !opal_addr_valid(__phb_status)) return OPAL_PARAMETER; if (!phb) @@ -103,12 +133,13 @@ static int64_t opal_pci_eeh_freeze_status(uint64_t phb_id, uint64_t pe_number, return OPAL_UNSUPPORTED; phb_lock(phb); - if (phb_status) + if (__phb_status) prlog(PR_ERR, "PHB#%04llx: %s: deprecated PHB status\n", phb_id, __func__); rc = phb->ops->eeh_freeze_status(phb, pe_number, freeze_state, - pci_error_type, NULL); + &pci_error_type, NULL); + *__pci_error_type = cpu_to_be16(pci_error_type); phb_unlock(phb); return rc; @@ -371,12 +402,14 @@ opal_call(OPAL_PCI_SET_XIVE_PE, opal_pci_set_xive_pe, 3); static int64_t opal_get_msi_32(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num, uint8_t msi_range, - uint32_t *msi_address, uint32_t *message_data) + __be32 *__msi_address, __be32 *__message_data) { struct phb *phb = pci_get_phb(phb_id); + uint32_t msi_address; + uint32_t message_data; int64_t rc; - if (!opal_addr_valid(msi_address) || !opal_addr_valid(message_data)) + if (!opal_addr_valid(__msi_address) || !opal_addr_valid(__message_data)) return OPAL_PARAMETER; if (!phb) @@ -385,21 +418,26 @@ static int64_t opal_get_msi_32(uint64_t phb_id, uint32_t mve_number, return OPAL_UNSUPPORTED; phb_lock(phb); rc = phb->ops->get_msi_32(phb, mve_number, xive_num, msi_range, - msi_address, message_data); + &msi_address, &message_data); phb_unlock(phb); + *__msi_address = cpu_to_be32(msi_address); + *__message_data = cpu_to_be32(message_data); + return rc; } opal_call(OPAL_GET_MSI_32, opal_get_msi_32, 6); static int64_t opal_get_msi_64(uint64_t phb_id, uint32_t mve_number, uint32_t xive_num, uint8_t msi_range, - uint64_t *msi_address, uint32_t *message_data) + __be64 *__msi_address, __be32 *__message_data) { struct phb *phb = pci_get_phb(phb_id); + uint64_t msi_address; + uint32_t message_data; int64_t rc; - if (!opal_addr_valid(msi_address) || !opal_addr_valid(message_data)) + if (!opal_addr_valid(__msi_address) || !opal_addr_valid(__message_data)) return OPAL_PARAMETER; if (!phb) @@ -408,9 +446,12 @@ static int64_t opal_get_msi_64(uint64_t phb_id, uint32_t mve_number, return OPAL_UNSUPPORTED; phb_lock(phb); rc = phb->ops->get_msi_64(phb, mve_number, xive_num, msi_range, - msi_address, message_data); + &msi_address, &message_data); phb_unlock(phb); + *__msi_address = cpu_to_be64(msi_address); + *__message_data = cpu_to_be32(message_data); + return rc; } opal_call(OPAL_GET_MSI_64, opal_get_msi_64, 6); @@ -482,7 +523,7 @@ static int64_t opal_phb_set_option(uint64_t phb_id, uint64_t opt, opal_call(OPAL_PHB_SET_OPTION, opal_phb_set_option, 3); static int64_t opal_phb_get_option(uint64_t phb_id, uint64_t opt, - uint64_t *setting) + __be64 *setting) { struct phb *phb = pci_get_phb(phb_id); int64_t rc; @@ -958,14 +999,17 @@ static int64_t opal_pci_get_phb_diag_data2(uint64_t phb_id, } opal_call(OPAL_PCI_GET_PHB_DIAG_DATA2, opal_pci_get_phb_diag_data2, 3); -static int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe, - uint16_t *pci_error_type, uint16_t *severity) +static int64_t opal_pci_next_error(uint64_t phb_id, __be64 *__first_frozen_pe, + __be16 *__pci_error_type, __be16 *__severity) { struct phb *phb = pci_get_phb(phb_id); + uint64_t first_frozen_pe; + uint16_t pci_error_type; + uint16_t severity; int64_t rc; - if (!opal_addr_valid(first_frozen_pe) || - !opal_addr_valid(pci_error_type) || !opal_addr_valid(severity)) + if (!opal_addr_valid(__first_frozen_pe) || + !opal_addr_valid(__pci_error_type) || !opal_addr_valid(__severity)) return OPAL_PARAMETER; if (!phb) @@ -975,10 +1019,14 @@ static int64_t opal_pci_next_error(uint64_t phb_id, uint64_t *first_frozen_pe, phb_lock(phb); opal_pci_eeh_clear_evt(phb_id); - rc = phb->ops->next_error(phb, first_frozen_pe, pci_error_type, - severity); + rc = phb->ops->next_error(phb, &first_frozen_pe, &pci_error_type, + &severity); phb_unlock(phb); + *__first_frozen_pe = cpu_to_be64(first_frozen_pe); + *__pci_error_type = cpu_to_be16(pci_error_type); + *__severity = cpu_to_be16(severity); + return rc; } opal_call(OPAL_PCI_NEXT_ERROR, opal_pci_next_error, 4); @@ -1039,11 +1087,12 @@ static int64_t opal_pci_set_p2p(uint64_t phbid_init, uint64_t phbid_target, } opal_call(OPAL_PCI_SET_P2P, opal_pci_set_p2p, 4); -static int64_t opal_pci_get_pbcq_tunnel_bar(uint64_t phb_id, uint64_t *addr) +static int64_t opal_pci_get_pbcq_tunnel_bar(uint64_t phb_id, __be64 *__addr) { struct phb *phb = pci_get_phb(phb_id); + uint64_t addr; - if (!opal_addr_valid(addr)) + if (!opal_addr_valid(__addr)) return OPAL_PARAMETER; if (!phb) @@ -1052,8 +1101,11 @@ static int64_t opal_pci_get_pbcq_tunnel_bar(uint64_t phb_id, uint64_t *addr) return OPAL_UNSUPPORTED; phb_lock(phb); - phb->ops->get_tunnel_bar(phb, addr); + phb->ops->get_tunnel_bar(phb, &addr); phb_unlock(phb); + + *__addr = cpu_to_be64(addr); + return OPAL_SUCCESS; } opal_call(OPAL_PCI_GET_PBCQ_TUNNEL_BAR, opal_pci_get_pbcq_tunnel_bar, 2); diff --git a/core/powercap.c b/core/powercap.c index b9d172b54..de2a79095 100644 --- a/core/powercap.c +++ b/core/powercap.c @@ -7,13 +7,19 @@ #include -static int opal_get_powercap(u32 handle, int token __unused, u32 *pcap) +static int opal_get_powercap(u32 handle, int token __unused, __be32 *__pcap) { - if (!pcap || !opal_addr_valid(pcap)) + if (!__pcap || !opal_addr_valid(__pcap)) return OPAL_PARAMETER; - if (powercap_get_class(handle) == POWERCAP_CLASS_OCC) - return occ_get_powercap(handle, pcap); + if (powercap_get_class(handle) == POWERCAP_CLASS_OCC) { + u32 pcap; + int rc; + + rc = occ_get_powercap(handle, &pcap); + *__pcap = cpu_to_be32(pcap); + return rc; + } return OPAL_UNSUPPORTED; }; diff --git a/core/psr.c b/core/psr.c index 4cd3768ae..6698df8d2 100644 --- a/core/psr.c +++ b/core/psr.c @@ -10,13 +10,19 @@ #include static int opal_get_power_shift_ratio(u32 handle, int token __unused, - u32 *ratio) + __be32 *__ratio) { - if (!ratio || !opal_addr_valid(ratio)) + if (!__ratio || !opal_addr_valid(__ratio)) return OPAL_PARAMETER; - if (psr_get_class(handle) == PSR_CLASS_OCC) - return occ_get_psr(handle, ratio); + if (psr_get_class(handle) == PSR_CLASS_OCC) { + u32 ratio; + int rc; + + rc = occ_get_psr(handle, &ratio); + *__ratio = cpu_to_be32(ratio); + return rc; + } return OPAL_UNSUPPORTED; }; diff --git a/core/sensor.c b/core/sensor.c index a804f968a..d63d909e6 100644 --- a/core/sensor.c +++ b/core/sensor.c @@ -20,12 +20,12 @@ static LIST_HEAD(async_read_list); struct sensor_async_read { struct list_node link; - u64 *sensor_data64; - u32 *sensor_data32; + __be64 *val; + __be32 *opal_data; int token; }; -static int add_to_async_read_list(int token, u32 *data32, u64 *data64) +static int add_to_async_read_list(int token, __be32 *opal_data, __be64 *val) { struct sensor_async_read *req; @@ -34,8 +34,8 @@ static int add_to_async_read_list(int token, u32 *data32, u64 *data64) return OPAL_NO_MEM; req->token = token; - req->sensor_data64 = data64; - req->sensor_data32 = data32; + req->val = val; + req->opal_data = opal_data; lock(&async_read_list_lock); list_add_tail(&async_read_list, &req->link); @@ -59,50 +59,58 @@ void check_sensor_read(int token) if (!req) goto out; - *req->sensor_data32 = *req->sensor_data64; - free(req->sensor_data64); + *req->opal_data = cpu_to_be32(be64_to_cpu(*req->val)); + free(req->val); list_del(&req->link); free(req); out: unlock(&async_read_list_lock); } -static s64 opal_sensor_read_u64(u32 sensor_hndl, int token, u64 *sensor_data) +static s64 opal_sensor_read_64(u32 sensor_hndl, int token, __be64 *data) { + s64 rc; + switch (sensor_get_family(sensor_hndl)) { case SENSOR_DTS: - return dts_sensor_read(sensor_hndl, token, sensor_data); + rc = dts_sensor_read(sensor_hndl, token, data); + return rc; + case SENSOR_OCC: - return occ_sensor_read(sensor_hndl, sensor_data); + rc = occ_sensor_read(sensor_hndl, data); + return rc; + default: break; } - if (platform.sensor_read) - return platform.sensor_read(sensor_hndl, token, sensor_data); + if (platform.sensor_read) { + rc = platform.sensor_read(sensor_hndl, token, data); + return rc; + } return OPAL_UNSUPPORTED; } static int64_t opal_sensor_read(uint32_t sensor_hndl, int token, - uint32_t *sensor_data) + __be32 *data) { - u64 *val; - s64 ret; + __be64 *val; + s64 rc; val = zalloc(sizeof(*val)); if (!val) return OPAL_NO_MEM; - ret = opal_sensor_read_u64(sensor_hndl, token, val); - if (!ret) { - *sensor_data = *val; + rc = opal_sensor_read_64(sensor_hndl, token, val); + if (rc == OPAL_SUCCESS) { + *data = cpu_to_be32(be64_to_cpu(*val)); free(val); - } else if (ret == OPAL_ASYNC_COMPLETION) { - ret = add_to_async_read_list(token, sensor_data, val); + } else if (rc == OPAL_ASYNC_COMPLETION) { + rc = add_to_async_read_list(token, data, val); } - return ret; + return rc; } static int opal_sensor_group_clear(u32 group_hndl, int token) @@ -139,6 +147,6 @@ void sensor_init(void) /* Register OPAL interface */ opal_register(OPAL_SENSOR_READ, opal_sensor_read, 3); opal_register(OPAL_SENSOR_GROUP_CLEAR, opal_sensor_group_clear, 2); - opal_register(OPAL_SENSOR_READ_U64, opal_sensor_read_u64, 3); + opal_register(OPAL_SENSOR_READ_U64, opal_sensor_read_64, 3); opal_register(OPAL_SENSOR_GROUP_ENABLE, opal_sensor_group_enable, 3); } diff --git a/hw/dts.c b/hw/dts.c index 31b068b78..c21c5c779 100644 --- a/hw/dts.c +++ b/hw/dts.c @@ -174,9 +174,9 @@ static void dts_async_read_temp(struct timer *t __unused, void *data, rc = dts_read_core_temp_p9(cpu->pir, &dts); if (!rc) { if (cpu->sensor_attr == SENSOR_DTS_ATTR_TEMP_MAX) - *cpu->sensor_data = dts.temp; + *cpu->sensor_data = cpu_to_be64(dts.temp); else if (cpu->sensor_attr == SENSOR_DTS_ATTR_TEMP_TRIP) - *cpu->sensor_data = dts.trip; + *cpu->sensor_data = cpu_to_be64(dts.trip); } if (!swkup_rc) @@ -191,7 +191,7 @@ static void dts_async_read_temp(struct timer *t __unused, void *data, } static int dts_read_core_temp(u32 pir, struct dts *dts, u8 attr, - int token, u64 *sensor_data) + int token, __be64 *sensor_data) { struct cpu_thread *cpu; int rc; @@ -286,7 +286,7 @@ enum sensor_dts_class { */ #define centaur_get_id(rid) (0x80000000 | ((rid) & 0x3ff)) -int64_t dts_sensor_read(u32 sensor_hndl, int token, u64 *sensor_data) +int64_t dts_sensor_read(u32 sensor_hndl, int token, __be64 *sensor_data) { uint8_t attr = sensor_get_attr(sensor_hndl); uint32_t rid = sensor_get_rid(sensor_hndl); @@ -313,9 +313,9 @@ int64_t dts_sensor_read(u32 sensor_hndl, int token, u64 *sensor_data) return rc; if (attr == SENSOR_DTS_ATTR_TEMP_MAX) - *sensor_data = dts.temp; + *sensor_data = cpu_to_be64(dts.temp); else if (attr == SENSOR_DTS_ATTR_TEMP_TRIP) - *sensor_data = dts.trip; + *sensor_data = cpu_to_be64(dts.trip); return 0; } diff --git a/hw/fake-rtc.c b/hw/fake-rtc.c index 328be97d9..fd2882d68 100644 --- a/hw/fake-rtc.c +++ b/hw/fake-rtc.c @@ -34,13 +34,15 @@ static int64_t fake_rtc_write(uint32_t ymd, uint64_t hmsm) return OPAL_SUCCESS; } -static int64_t fake_rtc_read(uint32_t *ymd, uint64_t *hmsm) +static int64_t fake_rtc_read(__be32 *__ymd, __be64 *__hmsm) { time_t sec; struct tm tm_calculated; + uint32_t ymd; + uint64_t hmsm; - if (!ymd || !hmsm) + if (!__ymd || !__hmsm) return OPAL_PARAMETER; /* Compute the emulated clock value */ @@ -48,10 +50,13 @@ static int64_t fake_rtc_read(uint32_t *ymd, uint64_t *hmsm) sec = tb_to_secs(mftb() - tb_synctime) + mktime(&tm_offset); gmtime_r(&sec, &tm_calculated); - tm_to_datetime(&tm_calculated, ymd, hmsm); + tm_to_datetime(&tm_calculated, &ymd, &hmsm); unlock(&emulation_lock); + *__ymd = cpu_to_be32(ymd); + *__hmsm = cpu_to_be64(hmsm); + return OPAL_SUCCESS; } diff --git a/hw/fsp/fsp-console.c b/hw/fsp/fsp-console.c index 1a2ecaba0..624efb469 100644 --- a/hw/fsp/fsp-console.c +++ b/hw/fsp/fsp-console.c @@ -579,7 +579,7 @@ void fsp_console_preinit(void) } -static int64_t fsp_console_write(int64_t term_number, int64_t *length, +static int64_t fsp_console_write(int64_t term_number, __be64 *__length, const uint8_t *buffer) { struct fsp_serial *fs; @@ -596,7 +596,7 @@ static int64_t fsp_console_write(int64_t term_number, int64_t *length, return OPAL_CLOSED; } /* Clamp to a reasonable size */ - requested = *length; + requested = be64_to_cpu(*__length); if (requested > 0x1000) requested = 0x1000; written = fsp_write_vserial(fs, buffer, requested); @@ -618,7 +618,7 @@ static int64_t fsp_console_write(int64_t term_number, int64_t *length, buffer[6], buffer[6], buffer[7], buffer[7]); #endif /* OPAL_DEBUG_CONSOLE_IO */ - *length = written; + *__length = cpu_to_be64(written); unlock(&fsp_con_lock); if (written) @@ -628,11 +628,12 @@ static int64_t fsp_console_write(int64_t term_number, int64_t *length, } static int64_t fsp_console_write_buffer_space(int64_t term_number, - int64_t *length) + __be64 *__length) { static bool elog_generated = false; struct fsp_serial *fs; struct fsp_serbuf_hdr *sb; + int64_t length; if (term_number < 0 || term_number >= MAX_SERIAL) return OPAL_PARAMETER; @@ -645,15 +646,16 @@ static int64_t fsp_console_write_buffer_space(int64_t term_number, return OPAL_CLOSED; } sb = fs->out_buf; - *length = (sb->next_out + SER_BUF_DATA_SIZE - sb->next_in - 1) + length = (sb->next_out + SER_BUF_DATA_SIZE - sb->next_in - 1) % SER_BUF_DATA_SIZE; unlock(&fsp_con_lock); /* Console buffer has enough space to write incoming data */ - if (*length != fs->out_buf_prev_len) { - fs->out_buf_prev_len = *length; + if (length != fs->out_buf_prev_len) { + fs->out_buf_prev_len = length; fs->out_buf_timeout = 0; + *__length = cpu_to_be64(length); return OPAL_SUCCESS; } @@ -667,8 +669,10 @@ static int64_t fsp_console_write_buffer_space(int64_t term_number, secs_to_tb(SER_BUFFER_OUT_TIMEOUT); } - if (tb_compare(mftb(), fs->out_buf_timeout) != TB_AAFTERB) + if (tb_compare(mftb(), fs->out_buf_timeout) != TB_AAFTERB) { + *__length = cpu_to_be64(length); return OPAL_SUCCESS; + } /* * FSP is still active but not reading console data. Hence @@ -686,13 +690,13 @@ static int64_t fsp_console_write_buffer_space(int64_t term_number, return OPAL_RESOURCE; } -static int64_t fsp_console_read(int64_t term_number, int64_t *length, +static int64_t fsp_console_read(int64_t term_number, __be64 *__length, uint8_t *buffer) { struct fsp_serial *fs; struct fsp_serbuf_hdr *sb; bool pending = false; - uint32_t old_nin, n, i, chunk, req = *length; + uint32_t old_nin, n, i, chunk, req = be64_to_cpu(*__length); int rc = OPAL_SUCCESS; if (term_number < 0 || term_number >= MAX_SERIAL) @@ -716,7 +720,7 @@ static int64_t fsp_console_read(int64_t term_number, int64_t *length, pending = true; n = req; } - *length = n; + *__length = cpu_to_be64(n); chunk = SER_BUF_DATA_SIZE - sb->next_out; if (chunk > n) diff --git a/hw/fsp/fsp-rtc.c b/hw/fsp/fsp-rtc.c index 53838f87c..e68836e66 100644 --- a/hw/fsp/fsp-rtc.c +++ b/hw/fsp/fsp-rtc.c @@ -249,12 +249,13 @@ static int64_t fsp_rtc_send_read_request(void) return OPAL_BUSY_EVENT; } -static int64_t fsp_opal_rtc_read(uint32_t *year_month_day, - uint64_t *hour_minute_second_millisecond) +static int64_t fsp_opal_rtc_read(__be32 *__ymd, __be64 *__hmsm) { int64_t rc; + uint32_t ymd; + uint64_t hmsm; - if (!year_month_day || !hour_minute_second_millisecond) + if (!__ymd || !__hmsm) return OPAL_PARAMETER; lock(&rtc_lock); @@ -267,8 +268,7 @@ static int64_t fsp_opal_rtc_read(uint32_t *year_month_day, /* During R/R of FSP, read cached TOD */ if (fsp_in_rr()) { if (rtc_tod_state == RTC_TOD_VALID) { - rtc_cache_get_datetime(year_month_day, - hour_minute_second_millisecond); + rtc_cache_get_datetime(&ymd, &hmsm); rc = OPAL_SUCCESS; } else { rc = OPAL_INTERNAL_ERROR; @@ -290,11 +290,9 @@ static int64_t fsp_opal_rtc_read(uint32_t *year_month_day, opal_rtc_eval_events(true); if (rtc_tod_state == RTC_TOD_VALID) { - rtc_cache_get_datetime(year_month_day, - hour_minute_second_millisecond); + rtc_cache_get_datetime(&ymd, &hmsm); prlog(PR_TRACE,"FSP-RTC Cached datetime: %x %llx\n", - *year_month_day, - *hour_minute_second_millisecond); + ymd, hmsm); rc = OPAL_SUCCESS; } else { rc = OPAL_INTERNAL_ERROR; @@ -306,8 +304,7 @@ static int64_t fsp_opal_rtc_read(uint32_t *year_month_day, prlog(PR_TRACE, "RTC read timed out\n"); if (rtc_tod_state == RTC_TOD_VALID) { - rtc_cache_get_datetime(year_month_day, - hour_minute_second_millisecond); + rtc_cache_get_datetime(&ymd, &hmsm); rc = OPAL_SUCCESS; } else { rc = OPAL_INTERNAL_ERROR; @@ -319,6 +316,12 @@ static int64_t fsp_opal_rtc_read(uint32_t *year_month_day, } out: unlock(&rtc_lock); + + if (rc == OPAL_SUCCESS) { + *__ymd = cpu_to_be32(ymd); + *__hmsm = cpu_to_be64(hmsm); + } + return rc; } diff --git a/hw/fsp/fsp-sensor.c b/hw/fsp/fsp-sensor.c index 43c8ce40b..74deac7a7 100644 --- a/hw/fsp/fsp-sensor.c +++ b/hw/fsp/fsp-sensor.c @@ -70,7 +70,7 @@ enum spcn_attr { /* Parsed sensor attributes, passed through OPAL */ struct opal_sensor_data { uint64_t async_token; /* Asynchronous token */ - uint64_t *sensor_data; /* Kernel pointer to copy data */ + __be64 *sensor_data; /* Kernel pointer to copy data */ enum spcn_attr spcn_attr; /* Modifier attribute */ uint16_t rid; /* Sensor RID */ uint8_t frc; /* Sensor resource class */ @@ -243,7 +243,7 @@ static void fsp_sensor_process_data(struct opal_sensor_data *attr) sensor_buf_ptr += spcn_mod_data[attr->mod_index].entry_size; } - *(attr->sensor_data) = sensor_data; + *attr->sensor_data = cpu_to_be64(sensor_data); if (sensor_data == INVALID_DATA) queue_msg_for_delivery(OPAL_PARTIAL, attr); else @@ -345,7 +345,7 @@ static void fsp_sensor_read_complete(struct fsp_msg *msg) unlock(&sensor_lock); return; err: - *(attr->sensor_data) = INVALID_DATA; + *attr->sensor_data = cpu_to_be64(INVALID_DATA); queue_msg_for_delivery(rc, attr); unlock(&sensor_lock); log_simple_error(&e_info(OPAL_RC_SENSOR_ASYNC_COMPLETE), @@ -496,7 +496,7 @@ static int64_t parse_sensor_id(uint32_t handler, struct opal_sensor_data *attr) int64_t fsp_opal_read_sensor(uint32_t sensor_hndl, int token, - uint64_t *sensor_data) + __be64 *sensor_data) { struct opal_sensor_data *attr; int64_t rc; diff --git a/hw/ipmi/ipmi-rtc.c b/hw/ipmi/ipmi-rtc.c index deb4addcb..ad98f21c6 100644 --- a/hw/ipmi/ipmi-rtc.c +++ b/hw/ipmi/ipmi-rtc.c @@ -62,12 +62,13 @@ static int64_t ipmi_set_sel_time(uint32_t _tv) return ipmi_queue_msg(msg); } -static int64_t ipmi_opal_rtc_read(uint32_t *y_m_d, - uint64_t *h_m_s_m) +static int64_t ipmi_opal_rtc_read(__be32 *__ymd, __be64 *__hmsm) { int ret = 0; + uint32_t ymd; + uint64_t hmsm; - if (!y_m_d || !h_m_s_m) + if (!__ymd || !__hmsm) return OPAL_PARAMETER; switch(time_status) { @@ -83,7 +84,9 @@ static int64_t ipmi_opal_rtc_read(uint32_t *y_m_d, break; case updated: - rtc_cache_get_datetime(y_m_d, h_m_s_m); + rtc_cache_get_datetime(&ymd, &hmsm); + *__ymd = cpu_to_be32(ymd); + *__hmsm = cpu_to_be64(hmsm); time_status = idle; ret = OPAL_SUCCESS; break; diff --git a/hw/lpc-rtc.c b/hw/lpc-rtc.c index f560c8c9f..ba15941fb 100644 --- a/hw/lpc-rtc.c +++ b/hw/lpc-rtc.c @@ -139,14 +139,15 @@ static void lpc_init_hw(void) unlock(&rtc_lock); } -static int64_t lpc_opal_rtc_read(uint32_t *y_m_d, - uint64_t *h_m_s_m) +static int64_t lpc_opal_rtc_read(__be32 *__ymd, __be64 *__hmsm) { uint8_t val; int64_t rc = OPAL_SUCCESS; struct tm tm; + uint32_t ymd; + uint64_t hmsm; - if (!y_m_d || !h_m_s_m) + if (!__ymd || !__hmsm) return OPAL_PARAMETER; /* Return busy if updating. This is somewhat racy, but will @@ -172,7 +173,9 @@ static int64_t lpc_opal_rtc_read(uint32_t *y_m_d, rtc_cache_update(&tm); /* Convert to OPAL time */ - tm_to_datetime(&tm, y_m_d, h_m_s_m); + tm_to_datetime(&tm, &ymd, &hmsm); + *__ymd = cpu_to_be32(ymd); + *__hmsm = cpu_to_be64(hmsm); } return rc; diff --git a/hw/lpc-uart.c b/hw/lpc-uart.c index feca229b6..b37e04201 100644 --- a/hw/lpc-uart.c +++ b/hw/lpc-uart.c @@ -255,10 +255,10 @@ static uint32_t uart_tx_buf_space(void) (out_buf_prod + OUT_BUF_SIZE - out_buf_cons) % OUT_BUF_SIZE; } -static int64_t uart_opal_write(int64_t term_number, int64_t *length, +static int64_t uart_opal_write(int64_t term_number, __be64 *__length, const uint8_t *buffer) { - size_t written = 0, len = *length; + size_t written = 0, len = be64_to_cpu(*__length); if (term_number != 0) return OPAL_PARAMETER; @@ -277,19 +277,19 @@ static int64_t uart_opal_write(int64_t term_number, int64_t *length, unlock(&uart_lock); - *length = written; + *__length = cpu_to_be64(written); return OPAL_SUCCESS; } static int64_t uart_opal_write_buffer_space(int64_t term_number, - int64_t *length) + __be64 *__length) { if (term_number != 0) return OPAL_PARAMETER; lock(&uart_lock); - *length = uart_tx_buf_space(); + *__length = cpu_to_be64(uart_tx_buf_space()); unlock(&uart_lock); return OPAL_SUCCESS; @@ -326,10 +326,10 @@ static void uart_adjust_opal_event(void) } /* This is called with the console lock held */ -static int64_t uart_opal_read(int64_t term_number, int64_t *length, +static int64_t uart_opal_read(int64_t term_number, __be64 *__length, uint8_t *buffer) { - size_t req_count = *length, read_cnt = 0; + size_t req_count = be64_to_cpu(*__length), read_cnt = 0; uint8_t lsr = 0; if (term_number != 0) @@ -373,7 +373,7 @@ static int64_t uart_opal_read(int64_t term_number, int64_t *length, /* Adjust the OPAL event */ uart_adjust_opal_event(); - *length = read_cnt; + *__length = cpu_to_be64(read_cnt); return OPAL_SUCCESS; } diff --git a/hw/lpc.c b/hw/lpc.c index ec5146fbf..abf549746 100644 --- a/hw/lpc.c +++ b/hw/lpc.c @@ -673,27 +673,36 @@ int64_t lpc_probe_read(enum OpalLPCAddressType addr_type, uint32_t addr, * existing Linux expectations */ static int64_t opal_lpc_read(uint32_t chip_id, enum OpalLPCAddressType addr_type, - uint32_t addr, uint32_t *data, uint32_t sz) + uint32_t addr, __be32 *data, uint32_t sz) { struct proc_chip *chip; int64_t rc; + uint32_t tmp; chip = get_chip(chip_id); if (!chip || !chip->lpc) return OPAL_PARAMETER; - if (addr_type == OPAL_LPC_FW || sz == 1) - return __lpc_read(chip->lpc, addr_type, addr, data, sz, false); - *data = 0; - while(sz--) { - uint32_t byte; - - rc = __lpc_read(chip->lpc, addr_type, addr, &byte, 1, false); + if (addr_type == OPAL_LPC_FW) { + rc = __lpc_read(chip->lpc, addr_type, addr, &tmp, sz, false); if (rc) return rc; - *data = *data | (byte << (8 * sz)); - addr++; + + } else { + tmp = 0; + while (sz--) { + uint32_t byte; + + rc = __lpc_read(chip->lpc, addr_type, addr, &byte, 1, false); + if (rc) + return rc; + tmp = tmp | (byte << (8 * sz)); + addr++; + } } + + *data = cpu_to_be32(tmp); + return OPAL_SUCCESS; } diff --git a/hw/npu2-opencapi.c b/hw/npu2-opencapi.c index ed6650f4b..19589c92d 100644 --- a/hw/npu2-opencapi.c +++ b/hw/npu2-opencapi.c @@ -2250,10 +2250,12 @@ out: } static int64_t opal_npu_mem_alloc(uint64_t phb_id, uint32_t __unused bdfn, - uint64_t size, uint64_t *bar) + uint64_t size, __be64 *__bar) { struct phb *phb = pci_get_phb(phb_id); struct npu2_dev *dev; + uint64_t bar; + int64_t rc; if (!phb || phb->phb_type != phb_type_npu_v2_opencapi) @@ -2263,10 +2265,14 @@ static int64_t opal_npu_mem_alloc(uint64_t phb_id, uint32_t __unused bdfn, if (!dev) return OPAL_PARAMETER; - if (!opal_addr_valid(bar)) + if (!opal_addr_valid(__bar)) return OPAL_PARAMETER; - return alloc_mem_bar(dev, size, bar); + rc = alloc_mem_bar(dev, size, &bar); + if (rc == OPAL_SUCCESS) + *__bar = cpu_to_be64(bar); + + return rc; } opal_call(OPAL_NPU_MEM_ALLOC, opal_npu_mem_alloc, 4); diff --git a/hw/occ-sensor.c b/hw/occ-sensor.c index 8434c1930..da846bd92 100644 --- a/hw/occ-sensor.c +++ b/hw/occ-sensor.c @@ -241,13 +241,14 @@ static void *select_sensor_buffer(struct occ_sensor_data_header *hb, int id) return buffer; } -int occ_sensor_read(u32 handle, u64 *data) +int occ_sensor_read(u32 handle, __be64 *data) { struct occ_sensor_data_header *hb; struct occ_sensor_name *md; u16 id = sensor_get_rid(handle); u8 occ_num = sensor_get_frc(handle); u8 attr = sensor_get_attr(handle); + u64 d; void *buff; if (occ_num > MAX_OCCS) @@ -271,15 +272,17 @@ int occ_sensor_read(u32 handle, u64 *data) if (!buff) return OPAL_HARDWARE; - *data = read_sensor(buff, attr); - if (!*data) + d = read_sensor(buff, attr); + if (!d) return OPAL_SUCCESS; md = get_names_block(hb); if (md[id].type == OCC_SENSOR_TYPE_POWER && attr == SENSOR_ACCUMULATOR) - scale_energy(&md[id], data); + scale_energy(&md[id], &d); else - scale_sensor(&md[id], data); + scale_sensor(&md[id], &d); + + *data = cpu_to_be64(d); return OPAL_SUCCESS; } diff --git a/hw/phb4.c b/hw/phb4.c index e96466d87..85d6a0c06 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -1571,7 +1571,7 @@ static int64_t phb4_set_option(struct phb *phb, enum OpalPhbOption opt, } static int64_t phb4_get_option(struct phb *phb, enum OpalPhbOption opt, - uint64_t *setting) + __be64 *setting) { struct phb4 *p = phb_to_phb4(phb); uint64_t data64; @@ -1579,10 +1579,10 @@ static int64_t phb4_get_option(struct phb *phb, enum OpalPhbOption opt, data64 = phb4_read_reg(p, PHB_CTRLR); switch (opt) { case OPAL_PHB_OPTION_TVE1_4GB: - *setting = (data64 & PPC_BIT(24)) ? 1 : 0; + *setting = cpu_to_be64((data64 & PPC_BIT(24)) ? 1 : 0); break; case OPAL_PHB_OPTION_MMIO_EEH_DISABLE: - *setting = (data64 & PPC_BIT(14)) ? 1 : 0; + *setting = cpu_to_be64((data64 & PPC_BIT(14)) ? 1 : 0); break; default: return OPAL_UNSUPPORTED; diff --git a/hw/xscom.c b/hw/xscom.c index 381cf2c4a..a85169598 100644 --- a/hw/xscom.c +++ b/hw/xscom.c @@ -638,7 +638,17 @@ int _xscom_read(uint32_t partid, uint64_t pcb_addr, uint64_t *val, bool take_loc return rc; } -opal_call(OPAL_XSCOM_READ, xscom_read, 3); +static int64_t opal_xscom_read(uint32_t partid, uint64_t pcb_addr, __be64 *__val) +{ + uint64_t val; + int64_t rc; + + rc = xscom_read(partid, pcb_addr, &val); + *__val = cpu_to_be64(val); + + return rc; +} +opal_call(OPAL_XSCOM_READ, opal_xscom_read, 3); int _xscom_write(uint32_t partid, uint64_t pcb_addr, uint64_t val, bool take_lock) { @@ -682,7 +692,12 @@ int _xscom_write(uint32_t partid, uint64_t pcb_addr, uint64_t val, bool take_loc unlock(&xscom_lock); return rc; } -opal_call(OPAL_XSCOM_WRITE, xscom_write, 3); + +static int64_t opal_xscom_write(uint32_t partid, uint64_t pcb_addr, uint64_t val) +{ + return xscom_write(partid, pcb_addr, val); +} +opal_call(OPAL_XSCOM_WRITE, opal_xscom_write, 3); /* * Perform a xscom read-modify-write. diff --git a/include/console.h b/include/console.h index 26602b7ac..230b825b0 100644 --- a/include/console.h +++ b/include/console.h @@ -47,13 +47,13 @@ struct opal_con_ops { */ void (*init)(void); - int64_t (*write)(int64_t term, int64_t *len, const uint8_t *buf); - int64_t (*read)(int64_t term, int64_t *len, uint8_t *buf); + int64_t (*write)(int64_t term, __be64 *__len, const uint8_t *buf); + int64_t (*read)(int64_t term, __be64 *__len, uint8_t *buf); /* * returns the amount of space available in the console write buffer */ - int64_t (*space)(int64_t term_number, int64_t *length); + int64_t (*space)(int64_t term_number, __be64 *__length); /* * Forces the write buffer to be flushed by the driver diff --git a/include/cpu.h b/include/cpu.h index 5fdcc9862..7b1c1bcf3 100644 --- a/include/cpu.h +++ b/include/cpu.h @@ -103,7 +103,7 @@ struct cpu_thread { */ struct lock dts_lock; struct timer dts_timer; - u64 *sensor_data; + __be64 *sensor_data; u32 sensor_attr; u32 token; bool dts_read_in_progress; diff --git a/include/dts.h b/include/dts.h index 2b54054e4..66f81a294 100644 --- a/include/dts.h +++ b/include/dts.h @@ -6,7 +6,7 @@ #include -extern int64_t dts_sensor_read(u32 sensor_hndl, int token, u64 *sensor_data); +extern int64_t dts_sensor_read(u32 sensor_hndl, int token, __be64 *sensor_data); extern bool dts_sensor_create_nodes(struct dt_node *sensors); #endif /* __DTS_H */ diff --git a/include/fsp.h b/include/fsp.h index b4c17598e..b2827b327 100644 --- a/include/fsp.h +++ b/include/fsp.h @@ -819,7 +819,7 @@ extern void fsp_memory_err_init(void); /* Sensor */ extern void fsp_init_sensor(void); extern int64_t fsp_opal_read_sensor(uint32_t sensor_hndl, int token, - uint64_t *sensor_data); + __be64 *sensor_data); /* Diagnostic */ extern void fsp_init_diag(void); diff --git a/include/occ.h b/include/occ.h index 0030af5ae..ab45e9e46 100644 --- a/include/occ.h +++ b/include/occ.h @@ -32,7 +32,7 @@ bool occ_get_gpu_presence(struct proc_chip *chip, int gpu_num); /* OCC Inband Sensors */ extern bool occ_sensors_init(void); -extern int occ_sensor_read(u32 handle, u64 *data); +extern int occ_sensor_read(u32 handle, __be64 *data); extern int occ_sensor_group_clear(u32 group_hndl, int token); extern void occ_add_sensor_groups(struct dt_node *sg, u32 *phandles, u32 *ptype, int nr_phandles, int chipid); diff --git a/include/pci.h b/include/pci.h index a808b68da..0239e448a 100644 --- a/include/pci.h +++ b/include/pci.h @@ -294,7 +294,7 @@ struct phb_ops { int64_t (*set_option)(struct phb *phb, enum OpalPhbOption opt, uint64_t setting); int64_t (*get_option)(struct phb *phb, enum OpalPhbOption opt, - uint64_t *setting); + __be64 *setting); int64_t (*set_mve)(struct phb *phb, uint32_t mve_number, uint64_t pe_number); diff --git a/include/platform.h b/include/platform.h index 412f8fc80..6ecdbe474 100644 --- a/include/platform.h +++ b/include/platform.h @@ -258,7 +258,7 @@ struct platform { * Read a sensor value */ int64_t (*sensor_read)(uint32_t sensor_hndl, int token, - uint64_t *sensor_data); + __be64 *sensor_data); /* * Return the heartbeat time */ diff --git a/platforms/ibm-fsp/ibm-fsp.h b/platforms/ibm-fsp/ibm-fsp.h index b3418e692..16af68f8c 100644 --- a/platforms/ibm-fsp/ibm-fsp.h +++ b/platforms/ibm-fsp/ibm-fsp.h @@ -15,7 +15,7 @@ struct errorlog; extern int elog_fsp_commit(struct errorlog *buf); extern int64_t ibm_fsp_sensor_read(uint32_t sensor_hndl, int token, - uint64_t *sensor_data); + __be64 *sensor_data); /* Apollo PCI support */ extern void apollo_pci_setup_phb(struct phb *phb, diff --git a/platforms/mambo/mambo.c b/platforms/mambo/mambo.c index e523cd3eb..aa1bf8305 100644 --- a/platforms/mambo/mambo.c +++ b/platforms/mambo/mambo.c @@ -173,11 +173,13 @@ static void bogus_disk_flash_init(void) } } -static int64_t mambo_rtc_read(uint32_t *ymd, uint64_t *hmsm) +static int64_t mambo_rtc_read(__be32 *ymd, __be64 *hmsm) { int64_t mambo_time; struct tm t; time_t mt; + uint32_t __ymd; + uint64_t __hmsm; if (!ymd || !hmsm) return OPAL_PARAMETER; @@ -185,7 +187,10 @@ static int64_t mambo_rtc_read(uint32_t *ymd, uint64_t *hmsm) mambo_time = callthru0(SIM_GET_TIME_CODE); mt = mambo_time >> 32; gmtime_r(&mt, &t); - tm_to_datetime(&t, ymd, hmsm); + tm_to_datetime(&t, &__ymd, &__hmsm); + + *ymd = cpu_to_be32(__ymd); + *hmsm = cpu_to_be64(__hmsm); return OPAL_SUCCESS; }