From patchwork Thu Oct 10 12:10:00 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Pratik R. Sampat" X-Patchwork-Id: 1174835 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46q77p3ffGz9sN1 for ; Fri, 11 Oct 2019 10:48:22 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46q77p2hsSzDqQc for ; Fri, 11 Oct 2019 10:48:22 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=psampat@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 46pqfQ4lJrzDr4N for ; Thu, 10 Oct 2019 23:10:19 +1100 (AEDT) Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x9AC7xdt108088 for ; Thu, 10 Oct 2019 08:10:16 -0400 Received: from e06smtp07.uk.ibm.com (e06smtp07.uk.ibm.com [195.75.94.103]) by mx0b-001b2d01.pphosted.com with ESMTP id 2vj1nawrxy-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Thu, 10 Oct 2019 08:10:16 -0400 Received: from localhost by e06smtp07.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Thu, 10 Oct 2019 13:10:13 +0100 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps3075.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x9ACAARQ62586960 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Thu, 10 Oct 2019 12:10:10 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0F97D52050; Thu, 10 Oct 2019 12:10:10 +0000 (GMT) Received: from pratiks-thinkpad.ibmuc.com (unknown [9.199.37.96]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id 29CF652054; Thu, 10 Oct 2019 12:10:07 +0000 (GMT) From: Pratik Rajesh Sampat To: skiboot@lists.ozlabs.org, svaidy@linux.ibm.com, ego@linux.vnet.ibm.com, oohall@gmail.com, premjha2@in.ibm.com, akshay.adiga@linux.vnet.ibm.com, pratik.sampat@in.ibm.com Date: Thu, 10 Oct 2019 17:40:00 +0530 X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191010121000.23691-1-psampat@linux.ibm.com> References: <20191010121000.23691-1-psampat@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19101012-0028-0000-0000-000003A8D8BF X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19101012-0029-0000-0000-0000246AE118 Message-Id: <20191010121000.23691-4-psampat@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-10-10_04:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1908290000 definitions=main-1910100113 X-Mailman-Approved-At: Fri, 11 Oct 2019 10:47:36 +1100 Subject: [Skiboot] [PATCH Skiboot v1.2 3/3] Advertise the self-save and self-restore attributes in the device tree X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Support for self save and self restore interface is advertised in the device tree, along with the list of SPRs it supports for each. The Special Purpose Register identification is encoded in a 2048 bitmask structure, where each bit signifies the identification key of that SPR which is consistent with that of the Linux kernel for that register. Signed-off-by: Pratik Rajesh Sampat --- hw/slw.c | 72 +++++++++++++++++++++++++++++++++++++++++++++++ include/skiboot.h | 1 + 2 files changed, 73 insertions(+) diff --git a/hw/slw.c b/hw/slw.c index b79aaab3..d9c2d091 100644 --- a/hw/slw.c +++ b/hw/slw.c @@ -22,6 +22,7 @@ #include #include #include +#include #include #include @@ -753,6 +754,70 @@ static void slw_late_init_p9(struct proc_chip *chip) } } +/* Add device tree properties to determine self-save | restore */ +void add_cpu_self_save_properties(struct dt_node *power_mgt) +{ + int i; + struct dt_node *self_restore, *self_save; + bitmap_t *self_restore_map, *self_save_map; + /* 32 times 64 bits needed to store a 2048 bits bitmask*/ + const int bits_nr = 32; + + const uint64_t self_restore_regs[] = { + 0x130, // HSPRG0 + 0x13E, // LPCR + 0x151, // HMEER + 0x3F0, // HID0 + 0x3F1, // HID1 + 0x3F4, // HID4 + 0x3F6, // HID5 + 0x7D0, // MSR + 0x357 // PSCCR + }; + + const uint64_t self_save_regs[] = { + 0x130, // HSPRG0 + 0x13E, // LPCR + 0x151, // HMEER + 0x7D0, // MSR + 0x357 // PSCCR + }; + const int self_save_regs_nr = ARRAY_SIZE(self_save_regs); + const int self_restore_regs_nr = ARRAY_SIZE(self_restore_regs); + + self_save_map = zalloc(BITMAP_BYTES(0x800)); + self_restore_map = zalloc(BITMAP_BYTES(0x800)); + + for (i = 0; i < self_save_regs_nr; i++) + bitmap_set_bit(*self_save_map, self_save_regs[i]); + + for (i = 0; i < self_restore_regs_nr; i++) + bitmap_set_bit(*self_restore_map, self_restore_regs[i]); + + self_restore = dt_new(power_mgt, "self-restore"); + if (!self_restore) { + prerror("OCC: Failed to create self restore node"); + return; + } + dt_add_property_cells(self_restore, "active", 0x1); + + dt_add_property(self_restore, "sprn-bitmask", *self_restore_map, + bits_nr * sizeof(uint64_t)); + + self_save = dt_new(power_mgt, "self-save"); + if (!self_save) { + prerror("OCC: Failed to create self save node"); + return; + } + if (proc_gen == proc_gen_p9) { + dt_add_property_cells(self_save, "active", 0x1); + + dt_add_property(self_save, "sprn-bitmask", *self_save_map, + bits_nr * sizeof(uint64_t)); + } else + dt_add_property_cells(self_save, "active", 0x0); +} + /* Add device tree properties to describe idle states */ void add_cpu_idle_state_properties(void) { @@ -1543,6 +1608,7 @@ opal_call(OPAL_SLW_SELF_SAVE_REG, opal_slw_self_save_reg, 2); void slw_init(void) { struct proc_chip *chip; + struct dt_node *power_mgt; if (proc_chip_quirks & QUIRK_MAMBO_CALLOUTS) { wakeup_engine_state = WAKEUP_ENGINE_NOT_PRESENT; @@ -1568,4 +1634,10 @@ void slw_init(void) } } add_cpu_idle_state_properties(); + power_mgt = dt_find_by_path(dt_root, "/ibm,opal/power-mgt"); + if (!power_mgt) { + prerror("OCC: dt node /ibm,opal/power-mgt not found\n"); + return; + } + add_cpu_self_save_properties(power_mgt); } diff --git a/include/skiboot.h b/include/skiboot.h index 1aa8bf7c..e8f0f755 100644 --- a/include/skiboot.h +++ b/include/skiboot.h @@ -202,6 +202,7 @@ extern void early_uart_init(void); extern void homer_init(void); extern void slw_init(void); extern void add_cpu_idle_state_properties(void); +extern void add_cpu_self_save_properties(struct dt_node *power_mgt); extern void lpc_rtc_init(void); /* flash support */