From patchwork Tue Oct 1 06:59:53 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?C=C3=A9dric_Le_Goater?= X-Patchwork-Id: 1169751 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46j9Wt21mgz9sN1 for ; Tue, 1 Oct 2019 17:15:06 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46j9Wt0zmXzDqTh for ; Tue, 1 Oct 2019 17:15:06 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=kaod.org (client-ip=46.105.73.133; helo=10.mo177.mail-out.ovh.net; envelope-from=clg@kaod.org; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=kaod.org Received: from 10.mo177.mail-out.ovh.net (10.mo177.mail-out.ovh.net [46.105.73.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 46j9Nq6xfBzDq8F for ; Tue, 1 Oct 2019 17:08:58 +1000 (AEST) Received: from player731.ha.ovh.net (unknown [10.108.54.172]) by mo177.mail-out.ovh.net (Postfix) with ESMTP id 3F49D10C862 for ; Tue, 1 Oct 2019 09:00:43 +0200 (CEST) Received: from kaod.org (lfbn-1-2229-223.w90-76.abo.wanadoo.fr [90.76.50.223]) (Authenticated sender: clg@kaod.org) by player731.ha.ovh.net (Postfix) with ESMTPSA id C8576A3AB8FB; Tue, 1 Oct 2019 07:00:39 +0000 (UTC) From: =?utf-8?q?C=C3=A9dric_Le_Goater?= To: skiboot@lists.ozlabs.org Date: Tue, 1 Oct 2019 08:59:53 +0200 Message-Id: <20191001070002.20271-9-clg@kaod.org> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20191001070002.20271-1-clg@kaod.org> References: <20191001070002.20271-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 17985969540611345369 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedufedrgeefgdduuddvucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecuhedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm Subject: [Skiboot] [PATCH v3 08/17] xive/p9: obsolete OPAL_XIVE_IRQ_SHIFT_BUG flags X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" These were needed to workaround HW bugs in PHB4 LSIs of POWER9 DD1.0 processors. HW395455 P9/PHB4: Wrong Interrupt ESB CI Load Opcode Location in 64K page mode Signed-off-by: Cédric Le Goater --- include/opal-api.h | 2 +- include/xive.h | 2 +- hw/phb4.c | 1 + hw/xive.c | 7 ------- 4 files changed, 3 insertions(+), 9 deletions(-) diff --git a/include/opal-api.h b/include/opal-api.h index e7156f36a756..dd74e662cd95 100644 --- a/include/opal-api.h +++ b/include/opal-api.h @@ -1148,7 +1148,7 @@ enum { OPAL_XIVE_IRQ_TRIGGER_PAGE = 0x00000001, OPAL_XIVE_IRQ_STORE_EOI = 0x00000002, OPAL_XIVE_IRQ_LSI = 0x00000004, - OPAL_XIVE_IRQ_SHIFT_BUG = 0x00000008, + OPAL_XIVE_IRQ_SHIFT_BUG = 0x00000008, /* DD1.0 workaround */ OPAL_XIVE_IRQ_MASK_VIA_FW = 0x00000010, /* DD1.0 workaround */ OPAL_XIVE_IRQ_EOI_VIA_FW = 0x00000020, /* DD1.0 workaround */ }; diff --git a/include/xive.h b/include/xive.h index 224d65837f53..5706d275ae47 100644 --- a/include/xive.h +++ b/include/xive.h @@ -41,7 +41,7 @@ uint32_t xive_get_notify_base(uint32_t girq); #define XIVE_SRC_EOI_PAGE1 0x02 /* EOI on the second page */ #define XIVE_SRC_STORE_EOI 0x04 /* EOI using stores supported */ #define XIVE_SRC_LSI 0x08 /* Interrupt is an LSI */ -#define XIVE_SRC_SHIFT_BUG 0x10 /* ESB update offset << 4 */ +#define XIVE_SRC_SHIFT_BUG 0x10 /* ESB update offset << 4 (PHB4 LSI DD1) */ struct irq_source_ops; void xive_register_hw_source(uint32_t base, uint32_t count, uint32_t shift, diff --git a/hw/phb4.c b/hw/phb4.c index 3c71427aef2f..f02e675f0a02 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -5738,6 +5738,7 @@ static void phb4_create(struct dt_node *np) xive_register_hw_source(p->base_msi, p->num_irqs - 8, 16, p->int_mmio, irq_flags, NULL, NULL); + /* XIVE_SRC_SHIFT_BUG is a DD1 workaround */ xive_register_hw_source(p->base_lsi, 8, 16, p->int_mmio + ((p->num_irqs - 8) << 16), XIVE_SRC_LSI | XIVE_SRC_SHIFT_BUG, diff --git a/hw/xive.c b/hw/xive.c index 4a2b0df7b042..84c1c107f253 100644 --- a/hw/xive.c +++ b/hw/xive.c @@ -2219,9 +2219,6 @@ static void xive_update_irq_mask(struct xive_src *s, uint32_t idx, bool masked) else offset = 0xc00; /* PQ = 00 */ - if (s->flags & XIVE_SRC_SHIFT_BUG) - offset <<= 4; - in_be64(mmio_base + offset); } @@ -2404,8 +2401,6 @@ static void __xive_source_eoi(struct irq_source *is, uint32_t isn) in_be64(mmio_base); else { offset = 0xc00; - if (s->flags & XIVE_SRC_SHIFT_BUG) - offset <<= 4; eoi_val = in_be64(mmio_base + offset); xive_vdbg(s->xive, "ISN: %08x EOI=%llx\n", isn, eoi_val); @@ -3602,8 +3597,6 @@ static uint64_t xive_convert_irq_flags(uint64_t iflags) if (iflags & XIVE_SRC_LSI) oflags |= OPAL_XIVE_IRQ_LSI; - if (iflags & XIVE_SRC_SHIFT_BUG) - oflags |= OPAL_XIVE_IRQ_SHIFT_BUG; return oflags; }