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[v3,03/17] xive/p9: use MMIO access for VC_EQC_CONFIG

Message ID 20191001070002.20271-4-clg@kaod.org
State Accepted
Headers show
Series xive/p9: fixes and cleanups | expand

Checks

Context Check Description
snowpatch_ozlabs/apply_patch success Successfully applied on branch master (470ffb5f29d741c3bed600f7bb7bf0cbb270e05a)
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot success Test snowpatch/job/snowpatch-skiboot on branch master
snowpatch_ozlabs/snowpatch_job_snowpatch-skiboot-dco success Signed-off-by present

Commit Message

Cédric Le Goater Oct. 1, 2019, 6:59 a.m. UTC 
There is no reason to issue loads on XSCOM when syncing the interrupt
controller. All should be in place to use MMIOs.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
---
 hw/xive.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/hw/xive.c b/hw/xive.c
index 5369369b9895..89e3e2def1be 100644
--- a/hw/xive.c
+++ b/hw/xive.c
@@ -2530,7 +2530,7 @@  static int64_t xive_sync(struct xive *x)
 
 	/* XXX Add timeout */
 	for (;;) {
-		r = xive_regrx(x, VC_EQC_CONFIG);
+		r = xive_regr(x, VC_EQC_CONFIG);
 		if ((r & SYNC_MASK) == SYNC_MASK)
 			break;
 		cpu_relax();