From patchwork Thu Sep 5 10:50:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1158366 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 46PHZK6L7kz9s3Z for ; Thu, 5 Sep 2019 20:52:09 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="cHIPhXhK"; dkim-atps=neutral Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 46PHZK5LBFzDr5k for ; Thu, 5 Sep 2019 20:52:09 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::644; helo=mail-pl1-x644.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="cHIPhXhK"; dkim-atps=neutral Received: from mail-pl1-x644.google.com (mail-pl1-x644.google.com [IPv6:2607:f8b0:4864:20::644]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 46PHY326mpzDqsZ for ; Thu, 5 Sep 2019 20:51:03 +1000 (AEST) Received: by mail-pl1-x644.google.com with SMTP id bd8so1113442plb.6 for ; Thu, 05 Sep 2019 03:51:03 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7GxPBkLlSUaomBbuyZnBYRjR+j/2FTOQzB6QCRTTEdI=; b=cHIPhXhK3hpT/vzr5dEah2r0/1WTypDZZegYW3VL+6yLyCCFwS3rfQL0Rw5X7cIeUW hytUTip8CyQa7sU9OljBv1hFnWjBoKnOym7Wt9Zg6bjYW+AvKG0cSdLBZ+izzzkq3BHZ mDlw4OIj7bDA7J0tTpYhRN9ERaN8VXGcOw91KakAStGaVKpfPBMwQ77sNWhvH2bxKazQ hmyW2VTC2gZOUk7pbDlukynIk0B5PBC0/48fb+FgaB+uwGjC8/SleYz09yRRpVp6ybSP o213Z+nyke2Uk8TGl+CFQRfqCKGK/mJ1YEtyIdezAIIYZ07I3F59yz9NYFYh7Glvxuig bg7A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7GxPBkLlSUaomBbuyZnBYRjR+j/2FTOQzB6QCRTTEdI=; b=Vb+buee7bS4UI/HXJQULXZzucNWQiQfWFdZTWHt/RP7s1hyDO239PTwNkehVfulLb7 Adh5g+po4pj+ox99jK+HbnFE0uCyQAwUgbQfgZYU4bB5blvCX4urVzeg4X+xcdlZ1e87 MmAVaBXyDHus2RHMqRnZsE5BGiBWxeoeMoYzfuoAHDubrneP4LK0MhqibhRXnm9wyZm4 Ad8BG5eK8Sy4ot3aZC8m8lKcsSxzAMs0sD0xhAcS/9hv0tS3Lk4IDrXUhXcJuOGTiCfx gHo5JE3SlJFRLWc6KM77RWPB/lCbA+IEFLqaT5mGcox/qiuXEjLSI3lTJAJcW8hCz//E Bi8Q== X-Gm-Message-State: APjAAAVw8oe2hODWgMCh+LPSIbSBgc4K4Os2lPuqAcL28Q0cvIwfzNWG SxNE2JgINAD/yfqCF4kLuuc2Fxil X-Google-Smtp-Source: APXvYqz9fEOLpZZDdayva74Ny94Zw6YKjkg0tEYypOgASxczwtvBj/TYvsRCqn2845Iqw6zToo0Lbw== X-Received: by 2002:a17:902:b20c:: with SMTP id t12mr2649803plr.205.1567680660589; Thu, 05 Sep 2019 03:51:00 -0700 (PDT) Received: from wafer.ozlabs.ibm.com.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id 2sm4728985pfa.43.2019.09.05.03.50.58 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 05 Sep 2019 03:51:00 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Thu, 5 Sep 2019 20:50:42 +1000 Message-Id: <20190905105042.27526-4-oohall@gmail.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190905105042.27526-1-oohall@gmail.com> References: <20190905105042.27526-1-oohall@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH v3 4/4] hw/psi: Remove explicit external IRQ policy X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Rather than having an explicit policy use the presence of a platform defined external interrupt handler to determine whether we should direct the interrupt to OPAL or not. This lets us remove a pile of comments about why the policy is necessary and the comments about why we need to un-set it on P8+ Signed-off-by: Oliver O'Halloran Reviewed-by: Cédric Le Goater --- v3: Replaced the policy check with this. We can't check what to set the policy to in astbmc_early_init() since that's run inside the platform's probe function. As a result the platform structure has not been populated yet and there's no way to determine what the policy should be. --- hw/psi.c | 14 ++++++-------- include/psi.h | 12 ------------ platforms/astbmc/common.c | 3 --- platforms/astbmc/garrison.c | 11 ----------- platforms/astbmc/p8dnu.c | 11 ----------- 5 files changed, 6 insertions(+), 45 deletions(-) diff --git a/hw/psi.c b/hw/psi.c index d466f5a807e9..bc170bbcff13 100644 --- a/hw/psi.c +++ b/hw/psi.c @@ -29,7 +29,6 @@ static LIST_HEAD(psis); static u64 psi_link_timer; static u64 psi_link_timeout; static bool psi_link_poll_active; -static bool psi_ext_irq_policy = EXTERNAL_IRQ_POLICY_LINUX; static void psi_activate_phb(struct psi *psi); @@ -471,8 +470,8 @@ static uint64_t psi_p8_irq_attributes(struct irq_source *is, uint32_t isn) if (psi->no_lpc_irqs && idx == P8_IRQ_PSI_LPC) return IRQ_ATTR_TARGET_LINUX; - if (idx == P8_IRQ_PSI_EXTERNAL && - psi_ext_irq_policy == EXTERNAL_IRQ_POLICY_LINUX) + /* Only direct external interrupts to OPAL if we have a handler */ + if (idx == P8_IRQ_PSI_EXTERNAL && !platform.external_irq) return IRQ_ATTR_TARGET_LINUX; attr = IRQ_ATTR_TARGET_OPAL | IRQ_ATTR_TYPE_LSI; @@ -625,6 +624,10 @@ static uint64_t psi_p9_irq_attributes(struct irq_source *is __unused, if (is_lpc_serirq) return lpc_get_irq_policy(psi->chip_id, idx - P9_PSI_IRQ_LPC_SIRQ0); + /* Only direct external interrupts to OPAL if we have a handler */ + if (idx == P9_PSI_IRQ_EXTERNAL && !platform.external_irq) + return IRQ_ATTR_TARGET_LINUX | IRQ_ATTR_TYPE_LSI; + return IRQ_ATTR_TARGET_OPAL | IRQ_ATTR_TYPE_LSI; } @@ -649,11 +652,6 @@ static const struct irq_source_ops psi_p9_irq_ops = { .name = psi_p9_irq_name, }; -void psi_set_external_irq_policy(bool policy) -{ - psi_ext_irq_policy = policy; -} - static void psi_init_p8_interrupts(struct psi *psi) { uint32_t irq; diff --git a/include/psi.h b/include/psi.h index 9836e354a31b..ee1e0a7ae2ec 100644 --- a/include/psi.h +++ b/include/psi.h @@ -247,18 +247,6 @@ extern void psi_irq_reset(void); extern void psi_enable_fsp_interrupt(struct psi *psi); extern void psi_fsp_link_in_use(struct psi *psi); -/* - * Must be called by the platform probe() function as the policy - * is established before platform.init - * - * This defines whether the external interrupt should be passed to - * the OS or handled locally in skiboot. Return true for skiboot - * handling. Default if not called is Linux. - */ -#define EXTERNAL_IRQ_POLICY_LINUX false -#define EXTERNAL_IRQ_POLICY_SKIBOOT true -extern void psi_set_external_irq_policy(bool policy); - extern struct lock psi_lock; #endif /* __PSI_H */ diff --git a/platforms/astbmc/common.c b/platforms/astbmc/common.c index 85043f3b91e7..15ac231fbdae 100644 --- a/platforms/astbmc/common.c +++ b/platforms/astbmc/common.c @@ -465,9 +465,6 @@ void astbmc_early_init(void) /* Hostboot forgets to populate the PSI BAR */ astbmc_fixup_psi_bar(); - /* Send external interrupts to me */ - psi_set_external_irq_policy(EXTERNAL_IRQ_POLICY_SKIBOOT); - if (ast_sio_init()) { if (ast_io_init()) { astbmc_fixup_uart(); diff --git a/platforms/astbmc/garrison.c b/platforms/astbmc/garrison.c index 1b0f865c54e0..caf6113687be 100644 --- a/platforms/astbmc/garrison.c +++ b/platforms/astbmc/garrison.c @@ -258,17 +258,6 @@ static bool garrison_probe(void) /* Lot of common early inits here */ astbmc_early_init(); - /* - * Override external interrupt policy -> send to Linux - * - * On Naples, we get LPC interrupts via the built-in LPC - * controller demuxer, not an external CPLD. The external - * interrupt is for other uses, such as the TPM chip, we - * currently route it to Linux, but we might change that - * later if we decide we need it. - */ - psi_set_external_irq_policy(EXTERNAL_IRQ_POLICY_LINUX); - /* Fixups until HB get the NPU bindings */ dt_create_npu(); diff --git a/platforms/astbmc/p8dnu.c b/platforms/astbmc/p8dnu.c index a76fbd9dc7bb..e223d158bd97 100644 --- a/platforms/astbmc/p8dnu.c +++ b/platforms/astbmc/p8dnu.c @@ -307,17 +307,6 @@ static bool p8dnu_probe(void) /* Lot of common early inits here */ astbmc_early_init(); - /* - * Override external interrupt policy -> send to Linux - * - * On Naples, we get LPC interrupts via the built-in LPC - * controller demuxer, not an external CPLD. The external - * interrupt is for other uses, such as the TPM chip, we - * currently route it to Linux, but we might change that - * later if we decide we need it. - */ - psi_set_external_irq_policy(EXTERNAL_IRQ_POLICY_LINUX); - /* Fixups until HB get the NPU bindings */ dt_create_npu();