From patchwork Tue Apr 23 06:29:41 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Oliver O'Halloran X-Patchwork-Id: 1089094 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44pD8J1bSmz9s71 for ; Tue, 23 Apr 2019 16:30:08 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="UAwb4yNA"; dkim-atps=neutral Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 44pD8H6xd9zDqNC for ; Tue, 23 Apr 2019 16:30:07 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=gmail.com (client-ip=2607:f8b0:4864:20::642; helo=mail-pl1-x642.google.com; envelope-from=oohall@gmail.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=pass (p=none dis=none) header.from=gmail.com Authentication-Results: lists.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="UAwb4yNA"; dkim-atps=neutral Received: from mail-pl1-x642.google.com (mail-pl1-x642.google.com [IPv6:2607:f8b0:4864:20::642]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 44pD85557XzDqMp for ; Tue, 23 Apr 2019 16:29:57 +1000 (AEST) Received: by mail-pl1-x642.google.com with SMTP id o7so4742481pll.13 for ; Mon, 22 Apr 2019 23:29:57 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=2plLN9heB/mZji7d9zufjbMfXysTNuWtSZXqP+NhoFA=; b=UAwb4yNAxeXIzgMRxn93r8HMolXNrCjoHhjDYcvjBS5BWVyEN5MwZjPtlwaNks0xs7 pJHNhGBxp/snB/9KyN1XZwXc1WnChzQKFmGeIKOB/w596+y8+65+5YrRhL2+Kv9syrMP k+fhpvSHaXqI4+i2wh3qQyrsl4LiDMMuZ60FEX7oZXjTxSpBbmuuZO+0i1VsxCOwCMEq 3hW1iCsR9Z10qDLea7wp9ef+jyX4VtWPsbsxsslaRCI7J90IlTblVqwxhTwpC0Iea3EJ Ebz3ithedqtrLhPlCN7Gryt7qMumpWJB4yEe/NU2xJJuvID/+1ZXk+eq7B5mJaXTG+ox t1Sg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=2plLN9heB/mZji7d9zufjbMfXysTNuWtSZXqP+NhoFA=; b=W2F6nADXe0yL8/FN+sAhRdI+MwxtGYbLNpSup1f8UQTUsXuJwwooyz0N7WMgZ+Tyrm wGOEnKhoopikycVY1fAA4XhRF5pw/hrzLYof84onIp6p9GTe0jJxwuPgh9eTF2xnAaiQ lBrr7shQyNQY9rw6Z+JrNdyR9h66dezhk7U214zwiT/xh4+8jO8kBumYC5Di974RTzlO IUl4z4R0qgAP85urRqSQhUtO/m8fwC10WfjaTMAo77sa0sgwR6xmjEOf8r4I5QLMwDvE XcPerDPv/TUOf43pt8t606yK9MieR67qSDBbBuF+ePI/BsuvOCazh/lWAgzHWalHjtbQ gHQQ== X-Gm-Message-State: APjAAAXpCai32Z9IY7R/MM5StSCOknhnS5wsQNyO5hqXFlsSZwzZ5Yzq UoMDQaGMxPeO26dRkfG8gR0dBQcQ X-Google-Smtp-Source: APXvYqxHPg2ASffEPac3U03yRXTb0jd7d7BBKCVt4CjepIwY+VaMM3WrUCLm1N04G8yQ3rumW1r5rA== X-Received: by 2002:a17:902:9687:: with SMTP id n7mr24688324plp.105.1556000993462; Mon, 22 Apr 2019 23:29:53 -0700 (PDT) Received: from wafer.ozlabs.ibm.com ([122.99.82.10]) by smtp.gmail.com with ESMTPSA id j14sm19245840pfa.57.2019.04.22.23.29.51 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Mon, 22 Apr 2019 23:29:52 -0700 (PDT) From: Oliver O'Halloran To: skiboot@lists.ozlabs.org Date: Tue, 23 Apr 2019 16:29:41 +1000 Message-Id: <20190423062941.14217-1-oohall@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190422161336.GA19280@gmail.com> References: <20190422161336.GA19280@gmail.com> MIME-Version: 1.0 Subject: [Skiboot] [PATCH] core/interrupts: Clean up OPAL ICS node X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Maxim Polyakov Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" For some reason that's lost to time the OPAL interrupt-controller source device node has a unit address of 0. This causes dtc to emit warnings since the node overlaps with the memory@0 node. There is also no real need for the OPAL ICS node to even have a unit address since it has no registers (reflected by the zero length in reg). This patch reworks the OPAL ICS node so that it has no unit address which results in a bare top-level node called "interrupt-controller." While we're here get rid of the explicit device-tree traversal in get_ics_phandle() and use a cached copy that is setup in add_ics_node(). Suggested-by: Maxim Polyakov Signed-off-by: Oliver O'Halloran --- I had a look at the xics/xive code in linux and it doesn't seem that either make any assumptions about the @0 being in the unit address. Boot tested on a Tuleta and a Witherspoon without issues. --- core/interrupts.c | 32 +++++++++++++++++++------------- include/interrupts.h | 2 +- 2 files changed, 20 insertions(+), 14 deletions(-) diff --git a/core/interrupts.c b/core/interrupts.c index 5d7a68cd5eff..b4602d374ec3 100644 --- a/core/interrupts.c +++ b/core/interrupts.c @@ -173,18 +173,27 @@ uint32_t get_psi_interrupt(uint32_t chip_id) return irq; } +static struct dt_node *ics_node; -struct dt_node *add_ics_node(void) +void add_ics_node(void) { - struct dt_node *ics = dt_new_addr(dt_root, "interrupt-controller", 0); + struct dt_node *ics; bool has_xive; - if (!ics) - return NULL; + /* + * This should never happen, but this code is ancient so maybe there's + * some obscure edge case it's covering + */ + ics = dt_new(dt_root, "interrupt-controller"); + if (!ics) { + ics_node = dt_find_by_name(dt_root, "interrupt-controller"); + prlog(PR_DEBUG, "OPAL ICS node already exists?\n"); + + return; + } has_xive = proc_gen >= proc_gen_p9; - dt_add_property_cells(ics, "reg", 0, 0, 0, 0); dt_add_property_strings(ics, "compatible", has_xive ? "ibm,opal-xive-vc" : "IBM,ppc-xics", "IBM,opal-xics"); @@ -194,19 +203,16 @@ struct dt_node *add_ics_node(void) "PowerPC-Interrupt-Source-Controller"); dt_add_property(ics, "interrupt-controller", NULL, 0); - return ics; + ics_node = ics; } uint32_t get_ics_phandle(void) { - struct dt_node *i; - for (i = dt_first(dt_root); i; i = dt_next(dt_root, i)) { - if (streq(i->name, "interrupt-controller@0")) { - return i->phandle; - } - } - abort(); + if (!ics_node) + abort(); + + return ics_node->phandle; } void add_opal_interrupts(void) diff --git a/include/interrupts.h b/include/interrupts.h index 2c4fa7e92399..4a49bbaeb601 100644 --- a/include/interrupts.h +++ b/include/interrupts.h @@ -312,7 +312,7 @@ extern void irq_for_each_source(void (*cb)(struct irq_source *, void *), extern uint32_t get_psi_interrupt(uint32_t chip_id); -extern struct dt_node *add_ics_node(void); +extern void add_ics_node(void); extern void add_opal_interrupts(void); extern uint32_t get_ics_phandle(void);