From patchwork Fri Mar 15 16:44:40 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frederic Barrat X-Patchwork-Id: 1057131 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 44LWg12Vkbz9s3l for ; Sat, 16 Mar 2019 03:46:05 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 44LWg10qMHzDqVY for ; Sat, 16 Mar 2019 03:46:05 +1100 (AEDT) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=fbarrat@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 44LWdf08VZzDqTL for ; Sat, 16 Mar 2019 03:44:53 +1100 (AEDT) Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x2FGiBbp092964 for ; Fri, 15 Mar 2019 12:44:50 -0400 Received: from e06smtp04.uk.ibm.com (e06smtp04.uk.ibm.com [195.75.94.100]) by mx0b-001b2d01.pphosted.com with ESMTP id 2r8evpuaku-1 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=NOT) for ; Fri, 15 Mar 2019 12:44:50 -0400 Received: from localhost by e06smtp04.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; (version=TLSv1/SSLv3 cipher=AES256-GCM-SHA384 bits=256/256) Fri, 15 Mar 2019 16:44:47 -0000 Received: from d06av22.portsmouth.uk.ibm.com (d06av22.portsmouth.uk.ibm.com [9.149.105.58]) by b06cxnps4076.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id x2FGikmf32636980 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=OK); Fri, 15 Mar 2019 16:44:46 GMT Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 25F634C040; Fri, 15 Mar 2019 16:44:46 +0000 (GMT) Received: from d06av22.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D5B684C04E; Fri, 15 Mar 2019 16:44:45 +0000 (GMT) Received: from borneo.home (unknown [9.145.6.43]) by d06av22.portsmouth.uk.ibm.com (Postfix) with ESMTP; Fri, 15 Mar 2019 16:44:45 +0000 (GMT) From: Frederic Barrat To: skiboot@lists.ozlabs.org, andrew.donnellan@au1.ibm.com Date: Fri, 15 Mar 2019 17:44:40 +0100 X-Mailer: git-send-email 2.19.1 In-Reply-To: <20190315164440.13209-1-fbarrat@linux.ibm.com> References: <20190315164440.13209-1-fbarrat@linux.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 19031516-0016-0000-0000-000002635D93 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 19031516-0017-0000-0000-000032BE61DC Message-Id: <20190315164440.13209-4-fbarrat@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-03-15_11:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 mlxscore=0 impostorscore=0 mlxlogscore=999 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1810050000 definitions=main-1903150118 Subject: [Skiboot] [PATCH 3/3] npu2/hw-procedures: Fix parallel zcal for opencapi X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: clombard@linux.ibm.com, arbab@linux.ibm.com Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" For opencapi, we currently do impedance calibration when initializing the PHY for the device, which could run in parallel if we were rich and had multiple opencapi devices. But if 2 devices are on the same obus, the 2 calibration sequences could overlap, which likely yields bad results and is useless anyway since it only needs to be done once per obus. This patch splits the opencapi PHY reset in 2 parts: - a 'init' part called serially at boot. That's when zcal is done. If we have 2 devices on the same socket, the zcal won't be redone, since we're called serially and we'll see it has already be done for the obus - a 'reset' part called during fundamental reset as a prereq for link training. It does the PHY setup for a set of lanes and the dccal. The PHY team confirmed there's no dependency between zcal and the other reset steps and it can be moved earlier. Signed-off-by: Frederic Barrat Reviewed-by: Andrew Donnellan --- hw/npu2-hw-procedures.c | 7 +++++-- hw/npu2-opencapi.c | 5 +++-- include/npu2.h | 3 ++- 3 files changed, 10 insertions(+), 5 deletions(-) diff --git a/hw/npu2-hw-procedures.c b/hw/npu2-hw-procedures.c index 2f330957..b671b8ac 100644 --- a/hw/npu2-hw-procedures.c +++ b/hw/npu2-hw-procedures.c @@ -1017,17 +1017,20 @@ void npu2_opencapi_bump_ui_lane(struct npu2_dev *dev) } } -void npu2_opencapi_phy_setup(struct npu2_dev *dev) +void npu2_opencapi_phy_init(struct npu2_dev *dev) { + run_procedure(dev, 5); /* procedure_phy_tx_zcal */ /* * This is only required for OpenCAPI - Hostboot tries to set this * on systems where it can tell a link is OpenCAPI, but for * Witherspoon it needs to be done in skiboot after device detection. */ phy_write(dev, &NPU2_PHY_RX_RC_ENABLE_AUTO_RECAL, 0x1); +} +void npu2_opencapi_phy_reset(struct npu2_dev *dev) +{ run_procedure(dev, 4); /* procedure_phy_reset */ - run_procedure(dev, 5); /* procedure_phy_tx_zcal */ run_procedure(dev, 6); /* procedure_phy_rx_dccal */ } diff --git a/hw/npu2-opencapi.c b/hw/npu2-opencapi.c index b2740f38..090223e2 100644 --- a/hw/npu2-opencapi.c +++ b/hw/npu2-opencapi.c @@ -1194,7 +1194,7 @@ static int64_t npu2_opencapi_freset(struct pci_slot *slot) } dev->train_need_fence = true; slot->link_retries = OCAPI_LINK_TRAINING_RETRIES; - npu2_opencapi_phy_setup(dev); + npu2_opencapi_phy_reset(dev); /* fall-through */ case OCAPI_SLOT_FRESET_INIT: assert_odl_reset(chip_id, dev->brick_index); @@ -1603,7 +1603,7 @@ static int setup_irq(struct npu2 *p) static void setup_debug_training_state(struct npu2_dev *dev) { - npu2_opencapi_phy_setup(dev); + npu2_opencapi_phy_reset(dev); switch (npu2_ocapi_training_state) { case NPU2_TRAIN_PRBS31: @@ -1675,6 +1675,7 @@ static void setup_device(struct npu2_dev *dev) /* Procedure 13.1.3.9 - AFU Config BARs */ setup_afu_config_bars(dev->npu->chip_id, dev->npu->xscom_base, dev); setup_perf_counters(dev); + npu2_opencapi_phy_init(dev); set_fence_control(dev->npu->chip_id, dev->npu->xscom_base, dev->brick_index, 0b00); diff --git a/include/npu2.h b/include/npu2.h index b62d1748..a2bcc450 100644 --- a/include/npu2.h +++ b/include/npu2.h @@ -224,7 +224,8 @@ void npu2_set_link_flag(struct npu2_dev *ndev, uint8_t flag); void npu2_clear_link_flag(struct npu2_dev *ndev, uint8_t flag); uint32_t reset_ntl(struct npu2_dev *ndev); extern int nv_zcal_nominal; -void npu2_opencapi_phy_setup(struct npu2_dev *dev); +void npu2_opencapi_phy_init(struct npu2_dev *dev); +void npu2_opencapi_phy_reset(struct npu2_dev *dev); void npu2_opencapi_phy_prbs31(struct npu2_dev *dev); void npu2_opencapi_bump_ui_lane(struct npu2_dev *dev); int64_t npu2_freeze_status(struct phb *phb __unused,