@@ -21,9 +21,60 @@
#include <ipmi.h>
#include <psi.h>
#include <npu-regs.h>
+#include <pci.h>
+#include <pci-cfg.h>
#include "astbmc.h"
+/* backplane slots */
+static const struct slot_table_entry hdd_bay_slots[] = {
+ SW_PLUGGABLE("hdd0", 0xe),
+ SW_PLUGGABLE("hdd1", 0x4),
+ SW_PLUGGABLE("hdd2", 0x5),
+ SW_PLUGGABLE("hdd3", 0x6),
+ SW_PLUGGABLE("hdd4", 0x7),
+ SW_PLUGGABLE("hdd5", 0xf),
+ SW_PLUGGABLE("hdd6", 0xc),
+ SW_PLUGGABLE("hdd7", 0xd),
+ SW_PLUGGABLE("hdd8", 0x14),
+ SW_PLUGGABLE("hdd9", 0x17),
+ SW_PLUGGABLE("hdd10", 0x8),
+ SW_PLUGGABLE("hdd11", 0xb),
+ SW_PLUGGABLE("hdd12", 0x10),
+ SW_PLUGGABLE("hdd13", 0x13),
+ SW_PLUGGABLE("hdd14", 0x16),
+ SW_PLUGGABLE("hdd15", 0x09),
+ SW_PLUGGABLE("hdd16", 0xa),
+ SW_PLUGGABLE("hdd17", 0x11),
+ SW_PLUGGABLE("hdd18", 0x12),
+ SW_PLUGGABLE("hdd19", 0x15),
+
+ { .etype = st_end },
+};
+
+static void zaius_get_slot_info(struct phb *phb, struct pci_device *pd)
+{
+ const struct slot_table_entry *ent = NULL;
+
+ if (!pd || pd->slot)
+ return;
+
+ /*
+ * If we find a 9797 switch then assume it's the HDD Rack. This might
+ * break if we have another 9797 in the system for some reason. This is
+ * a really dumb hack, but until we get query the BMC about whether we
+ * have a HDD rack or not we don't have much of a choice.
+ */
+ if (pd->dev_type == PCIE_TYPE_SWITCH_DNPORT && pd->vdid == 0x979710b5)
+ for (ent = hdd_bay_slots; ent->etype != st_end; ent++)
+ if (ent->location == (pd->bdfn & 0xff))
+ break;
+ if (ent)
+ slot_table_add_slot_info(pd, ent);
+ else
+ slot_table_get_slot_info(phb, pd);
+}
+
const struct platform_ocapi zaius_ocapi = {
.i2c_engine = 1,
.i2c_port = 4,
@@ -186,7 +237,7 @@ DECLARE_PLATFORM(zaius) = {
.start_preload_resource = flash_start_preload_resource,
.resource_loaded = flash_resource_loaded,
.bmc = NULL, /* FIXME: Add openBMC */
- .pci_get_slot_info = slot_table_get_slot_info,
+ .pci_get_slot_info = zaius_get_slot_info,
.pci_probe_complete = check_all_slot_table,
.cec_power_down = astbmc_ipmi_power_down,
.cec_reboot = astbmc_ipmi_reboot,
The Barreleye G2 is distinct from the Zaius in that it features a 24 Bay NVMe/SATA HDD rack. To provide meaningful slot names for each NVMe device we need to define a slot table for the NVMe capable HDD bays. Unfortunately this isn't straightforward because the PCIe path to the NVMe devices isn't fixed. The PCIe topology is something like: P9 -> HBA card -> 9797 switch -> 20x NVMe HDD slots The 9797 switch is partitioned into two (or four) virtual switches which allow multiple HBA cards to be used (e.g. one per socket). As a result the exact BDFN of the ports will vary depending on how the system is configured. That said, the virtual switch configuration of the 9797 does not change the device and function numbers of the switch downports. This means that we can define a single slot table that maps switch ports to the NVMe bay names. Unfortunately we still need to guess which bus to use this table on, so we assume that any switch downport we find with the PEX9797 VDID is part of the 9797 that supports the HDD rack. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> --- platforms/astbmc/zaius.c | 53 +++++++++++++++++++++++++++++++++++++++++++++++- 1 file changed, 52 insertions(+), 1 deletion(-)