diff mbox series

phb4/capp: Update DMA read engines set in APC_FSM_READ_MASK based on link-width

Message ID 20180810090457.18426-1-vaibhav@linux.ibm.com
State Superseded
Headers show
Series phb4/capp: Update DMA read engines set in APC_FSM_READ_MASK based on link-width | expand

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Commit Message

Vaibhav Jain Aug. 10, 2018, 9:04 a.m. UTC
Commit 47c09cdfe7a3("phb4/capp: Calculate STQ/DMA read engines based
on link-width for PEC") update the CAPP init sequence by calculating
the needed STQ/DMA-read engines based on link width and populating it
in XPEC_NEST_CAPP_CNTL register. This however needs to be synchronized
with the value set in CAPP APC FSM Read Machine Mask Register.

Hence this patch update phb4_init_capp_regs() to calculate the link
width of the stack on PEC2 and populate the same values as previously
populated in PEC CAPP_CNTL register.

Cc: stable # v5.7+
Fixes: 47c09cdfe7a3("phb4/capp: Calculate STQ/DMA read engines based on link-width for PEC")
Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com>
---
 hw/phb4.c | 20 +++++++++++++++++---
 1 file changed, 17 insertions(+), 3 deletions(-)

Comments

Andrew Donnellan Aug. 10, 2018, 9:28 a.m. UTC | #1
On 10/08/18 19:04, Vaibhav Jain wrote:
> Commit 47c09cdfe7a3("phb4/capp: Calculate STQ/DMA read engines based
> on link-width for PEC") update the CAPP init sequence by calculating
> the needed STQ/DMA-read engines based on link width and populating it
> in XPEC_NEST_CAPP_CNTL register. This however needs to be synchronized
> with the value set in CAPP APC FSM Read Machine Mask Register.
> 
> Hence this patch update phb4_init_capp_regs() to calculate the link
> width of the stack on PEC2 and populate the same values as previously
> populated in PEC CAPP_CNTL register.
> 
> Cc: stable # v5.7+
> Fixes: 47c09cdfe7a3("phb4/capp: Calculate STQ/DMA read engines based on link-width for PEC")
> Signed-off-by: Vaibhav Jain <vaibhav@linux.ibm.com>

Minor style comments below

Otherwise this looks okay.

Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>

> ---
>   hw/phb4.c | 20 +++++++++++++++++---
>   1 file changed, 17 insertions(+), 3 deletions(-)
> 
> diff --git a/hw/phb4.c b/hw/phb4.c
> index 5e07e2bc..19e9a1ec 100644
> --- a/hw/phb4.c
> +++ b/hw/phb4.c
> @@ -3948,10 +3948,24 @@ static void phb4_init_capp_regs(struct phb4 *p, uint32_t capp_eng)
>   		xscom_write(p->chip_id, XPT_FSM_RMM + offset, reg);
>   	}
>   	if (p->index == CAPP1_PHB_INDEX) {
> -		/* Set 30 Read machines for CAPP Minus 20-27 for DMA */
> -		reg = 0xFFFFF00E00000000;
> -		if (capp_eng & CAPP_MAX_DMA_READ_ENGINES)
> +
> +		if (capp_eng & CAPP_MAX_DMA_READ_ENGINES) {
>   			reg = 0xF000000000000000;
> +		} else {
> +			/* Check if PEC is in x8 or x16 mode */
> +			xscom_read(p->chip_id, XPEC_PCI2_CPLT_CONF1, &reg);
> +			if ((reg & XPEC_PCI2_IOVALID_MASK) ==
> +			    XPEC_PCI2_IOVALID_X16)
> +				/* 0-47 (Read machines) are available for
> +				 * capp use
> +				 */
> +				reg = 0x0000FFFFFFFFFFFFULL;
> +			else
> +				/* Set 30 Read machines for CAPP Minus
> +				 * 20-27 for DMA
> +				 */
> +				reg = 0xFFFFF00E00000000;

It'd be more consistent to pad these numbers out to 16 digits, and to 
use the ULL suffix or not consistently as well

> +		}
>   		xscom_write(p->chip_id, APC_FSM_READ_MASK + offset, reg);
>   		xscom_write(p->chip_id, XPT_FSM_RMM + offset, reg);
>   	}
>
diff mbox series

Patch

diff --git a/hw/phb4.c b/hw/phb4.c
index 5e07e2bc..19e9a1ec 100644
--- a/hw/phb4.c
+++ b/hw/phb4.c
@@ -3948,10 +3948,24 @@  static void phb4_init_capp_regs(struct phb4 *p, uint32_t capp_eng)
 		xscom_write(p->chip_id, XPT_FSM_RMM + offset, reg);
 	}
 	if (p->index == CAPP1_PHB_INDEX) {
-		/* Set 30 Read machines for CAPP Minus 20-27 for DMA */
-		reg = 0xFFFFF00E00000000;
-		if (capp_eng & CAPP_MAX_DMA_READ_ENGINES)
+
+		if (capp_eng & CAPP_MAX_DMA_READ_ENGINES) {
 			reg = 0xF000000000000000;
+		} else {
+			/* Check if PEC is in x8 or x16 mode */
+			xscom_read(p->chip_id, XPEC_PCI2_CPLT_CONF1, &reg);
+			if ((reg & XPEC_PCI2_IOVALID_MASK) ==
+			    XPEC_PCI2_IOVALID_X16)
+				/* 0-47 (Read machines) are available for
+				 * capp use
+				 */
+				reg = 0x0000FFFFFFFFFFFFULL;
+			else
+				/* Set 30 Read machines for CAPP Minus
+				 * 20-27 for DMA
+				 */
+				reg = 0xFFFFF00E00000000;
+		}
 		xscom_write(p->chip_id, APC_FSM_READ_MASK + offset, reg);
 		xscom_write(p->chip_id, XPT_FSM_RMM + offset, reg);
 	}