From patchwork Thu Apr 12 12:45:23 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Frederic Barrat X-Patchwork-Id: 897641 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [203.11.71.2]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 40MLHw4ct5z9s2M for ; Thu, 12 Apr 2018 22:46:20 +1000 (AEST) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 40MLHw35xxzF1SP for ; Thu, 12 Apr 2018 22:46:20 +1000 (AEST) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=linux.ibm.com (client-ip=148.163.156.1; helo=mx0a-001b2d01.pphosted.com; envelope-from=fbarrat@linux.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0a-001b2d01.pphosted.com [148.163.156.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 40MLH560rhzDr4R for ; Thu, 12 Apr 2018 22:45:37 +1000 (AEST) Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w3CCfE41005332 for ; Thu, 12 Apr 2018 08:45:35 -0400 Received: from e06smtp11.uk.ibm.com (e06smtp11.uk.ibm.com [195.75.94.107]) by mx0a-001b2d01.pphosted.com with ESMTP id 2ha5ckxjeu-1 (version=TLSv1.2 cipher=AES256-SHA256 bits=256 verify=NOT) for ; Thu, 12 Apr 2018 08:45:35 -0400 Received: from localhost by e06smtp11.uk.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Thu, 12 Apr 2018 13:45:30 +0100 Received: from d06av21.portsmouth.uk.ibm.com (d06av21.portsmouth.uk.ibm.com [9.149.105.232]) by b06cxnps4074.portsmouth.uk.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w3CCjTec43647184; Thu, 12 Apr 2018 12:45:29 GMT Received: from d06av21.portsmouth.uk.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E28CA5204D; Thu, 12 Apr 2018 12:36:25 +0100 (BST) Received: from borneo.lab.toulouse-stg.fr.ibm.com (unknown [9.101.4.34]) by d06av21.portsmouth.uk.ibm.com (Postfix) with ESMTP id C322752043; Thu, 12 Apr 2018 12:36:25 +0100 (BST) From: Frederic Barrat To: andrew.donnellan@au1.ibm.com, skiboot@lists.ozlabs.org Date: Thu, 12 Apr 2018 14:45:23 +0200 X-Mailer: git-send-email 2.14.1 In-Reply-To: <20180412124526.12662-1-fbarrat@linux.ibm.com> References: <20180412124526.12662-1-fbarrat@linux.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18041212-0040-0000-0000-0000044CBF13 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18041212-0041-0000-0000-000020F0F2E2 Message-Id: <20180412124526.12662-3-fbarrat@linux.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2018-04-12_07:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=0 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1804120127 Subject: [Skiboot] [PATCH 2/5] npu2-opencapi: Rework adapter reset X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" From: Frederic Barrat Rework a bit the code to reset the opencapi adapter: - make clearer which i2c pin is resetting which device - break the reset operation in smaller chunks. This is really to prepare for a future patch. No functional changes. Signed-off-by: Frederic Barrat Acked-by: Andrew Donnellan --- core/platform.c | 15 ++++++---- hw/npu2-opencapi.c | 71 ++++++++++++++++++++++++++++++++++-------------- include/platform.h | 6 ++-- platforms/astbmc/zaius.c | 15 ++++++---- platforms/ibm-fsp/zz.c | 15 ++++++---- 5 files changed, 81 insertions(+), 41 deletions(-) diff --git a/core/platform.c b/core/platform.c index 174235d9..b7b048f2 100644 --- a/core/platform.c +++ b/core/platform.c @@ -34,6 +34,9 @@ DEFINE_LOG_ENTRY(OPAL_RC_ABNORMAL_REBOOT, OPAL_PLATFORM_ERR_EVT, OPAL_CEC, OPAL_CEC_HARDWARE, OPAL_PREDICTIVE_ERR_FAULT_RECTIFY_REBOOT, OPAL_ABNORMAL_POWER_OFF); +#define OCAPI_I2C_RESET_ADDR 0x20 +#define OCAPI_I2C_RESET_BOTTOM (1 << 1) +#define OCAPI_I2C_RESET_TOP (1 << 6) #define OCAPI_I2C_PRESENCE_ADDR 0x20 #define OCAPI_I2C_PRESENCE_BOTTOM (1 << 2) #define OCAPI_I2C_PRESENCE_TOP (1 << 7) @@ -174,11 +177,11 @@ static int generic_start_preload_resource(enum resource_id id, uint32_t subid, /* These values will work for a ZZ booted using BML */ const struct platform_ocapi generic_ocapi = { - .i2c_engine = 1, - .i2c_port = 4, - .i2c_offset = { 0x3, 0x1, 0x1 }, - .i2c_odl0_data = { 0xFD, 0xFD, 0xFF }, - .i2c_odl1_data = { 0xBF, 0xBF, 0xFF }, + .i2c_engine = 1, + .i2c_port = 4, + .i2c_reset_addr = OCAPI_I2C_RESET_ADDR, + .i2c_reset_odl0 = OCAPI_I2C_RESET_BOTTOM, + .i2c_reset_odl1 = OCAPI_I2C_RESET_TOP, .i2c_presence_addr = OCAPI_I2C_PRESENCE_ADDR, .i2c_presence_odl0 = OCAPI_I2C_PRESENCE_BOTTOM, .i2c_presence_odl1 = OCAPI_I2C_PRESENCE_TOP, @@ -187,7 +190,7 @@ const struct platform_ocapi generic_ocapi = { * force the presence until all our systems are upgraded */ .force_presence = true, - .odl_phy_swap = true, + .odl_phy_swap = true, }; static struct bmc_platform generic_bmc = { diff --git a/hw/npu2-opencapi.c b/hw/npu2-opencapi.c index b2bc0628..be0707ea 100644 --- a/hw/npu2-opencapi.c +++ b/hw/npu2-opencapi.c @@ -794,39 +794,70 @@ static void otl_enabletx(uint32_t gcid, uint32_t scom_base, uint64_t index) static void reset_ocapi_device(struct npu2_dev *dev) { - uint8_t data[3]; + uint8_t pin, data; int rc; - int i; switch (dev->index) { case 2: case 4: - memcpy(data, platform.ocapi->i2c_odl0_data, sizeof(data)); + pin = platform.ocapi->i2c_reset_odl0; break; case 3: case 5: - memcpy(data, platform.ocapi->i2c_odl1_data, sizeof(data)); + pin = platform.ocapi->i2c_reset_odl1; break; default: assert(false); } - for (i = 0; i < 3; i++) { - rc = i2c_request_send(dev->i2c_port_id_ocapi, 0x20, SMBUS_WRITE, - platform.ocapi->i2c_offset[i], 1, - &data[i], sizeof(data[i]), 120); - if (rc) { - /** - * @fwts-label OCAPIDeviceResetFailed - * @fwts-advice There was an error attempting to send - * a reset signal over I2C to the OpenCAPI device. - */ - prlog(PR_ERR, "OCAPI: Error writing I2C reset signal: %d\n", rc); - break; - } - if (i != 0) - time_wait_ms(5); - } + /* + * set the i2c reset pin in output mode + * + * On the 9554 device, register 3 is the configuration + * register and a pin is in output mode if its value is 0 + */ + data = ~pin; + rc = i2c_request_send(dev->i2c_port_id_ocapi, + platform.ocapi->i2c_reset_addr, SMBUS_WRITE, + 0x3, 1, + &data, sizeof(data), 120); + if (rc) + goto err; + + /* + * assert i2c reset for 5ms + * register 1 controls the signal, reset is active low + */ + data = ~pin; + rc = i2c_request_send(dev->i2c_port_id_ocapi, + platform.ocapi->i2c_reset_addr, SMBUS_WRITE, + 0x1, 1, + &data, sizeof(data), 120); + if (rc) + goto err; + time_wait_ms(5); + + /* + * deassert i2c reset and wait 5ms + */ + data = 0xFF; + rc = i2c_request_send(dev->i2c_port_id_ocapi, + platform.ocapi->i2c_reset_addr, SMBUS_WRITE, + 0x1, 1, + &data, sizeof(data), 120); + if (rc) + goto err; + time_wait_ms(5); + + return; + +err: + /** + * @fwts-label OCAPIDeviceResetFailed + * @fwts-advice There was an error attempting to send + * a reset signal over I2C to the OpenCAPI device. + */ + prlog(PR_ERR, "OCAPI: Error writing I2C reset signal: %d\n", rc); } static bool i2c_presence_detect(struct npu2_dev *dev) diff --git a/include/platform.h b/include/platform.h index 9a04ab37..d71fae78 100644 --- a/include/platform.h +++ b/include/platform.h @@ -48,9 +48,9 @@ struct bmc_platform { struct platform_ocapi { uint8_t i2c_engine; /* I2C engine number */ uint8_t i2c_port; /* I2C port number */ - uint32_t i2c_offset[3]; /* Offsets on I2C device */ - uint8_t i2c_odl0_data[3]; /* Data to reset ODL0 */ - uint8_t i2c_odl1_data[3]; /* Data to reset ODL1 */ + uint8_t i2c_reset_addr; /* I2C address for reset */ + uint8_t i2c_reset_odl0; /* I2C pin to write to reset ODL0 */ + uint8_t i2c_reset_odl1; /* I2C pin to write to reset ODL1 */ uint8_t i2c_presence_addr; /* I2C address for presence detection */ uint8_t i2c_presence_odl0; /* I2C pin to read to detect ODL0 */ uint8_t i2c_presence_odl1; /* I2C pin to read to detect ODL1 */ diff --git a/platforms/astbmc/zaius.c b/platforms/astbmc/zaius.c index 279fbf8b..170d828f 100644 --- a/platforms/astbmc/zaius.c +++ b/platforms/astbmc/zaius.c @@ -24,20 +24,23 @@ #include "astbmc.h" +#define OCAPI_I2C_RESET_ADDR 0x20 +#define OCAPI_I2C_RESET_BOTTOM (1 << 1) +#define OCAPI_I2C_RESET_TOP (1 << 6) #define OCAPI_I2C_PRESENCE_ADDR 0x20 #define OCAPI_I2C_PRESENCE_BOTTOM (1 << 2) #define OCAPI_I2C_PRESENCE_TOP (1 << 7) const struct platform_ocapi zaius_ocapi = { - .i2c_engine = 1, - .i2c_port = 4, - .i2c_offset = { 0x3, 0x1, 0x1 }, - .i2c_odl0_data = { 0xFD, 0xFD, 0xFF }, - .i2c_odl1_data = { 0xBF, 0xBF, 0xFF }, + .i2c_engine = 1, + .i2c_port = 4, + .i2c_reset_addr = OCAPI_I2C_RESET_ADDR, + .i2c_reset_odl0 = OCAPI_I2C_RESET_BOTTOM, + .i2c_reset_odl1 = OCAPI_I2C_RESET_TOP, .i2c_presence_addr = OCAPI_I2C_PRESENCE_ADDR, .i2c_presence_odl0 = OCAPI_I2C_PRESENCE_BOTTOM, .i2c_presence_odl1 = OCAPI_I2C_PRESENCE_TOP, - .odl_phy_swap = true, + .odl_phy_swap = true, }; #define NPU_BASE 0x5011000 diff --git a/platforms/ibm-fsp/zz.c b/platforms/ibm-fsp/zz.c index 66f29d44..d6920110 100644 --- a/platforms/ibm-fsp/zz.c +++ b/platforms/ibm-fsp/zz.c @@ -27,17 +27,20 @@ #include "ibm-fsp.h" #include "lxvpd.h" +#define OCAPI_I2C_RESET_ADDR 0x20 +#define OCAPI_I2C_RESET_BOTTOM (1 << 1) +#define OCAPI_I2C_RESET_TOP (1 << 6) #define OCAPI_I2C_PRESENCE_ADDR 0x20 #define OCAPI_I2C_PRESENCE_BOTTOM (1 << 2) #define OCAPI_I2C_PRESENCE_TOP (1 << 7) /* We don't yet create NPU device nodes on ZZ, but these values are correct */ const struct platform_ocapi zz_ocapi = { - .i2c_engine = 1, - .i2c_port = 4, - .i2c_offset = { 0x3, 0x1, 0x1 }, - .i2c_odl0_data = { 0xFD, 0xFD, 0xFF }, - .i2c_odl1_data = { 0xBF, 0xBF, 0xFF }, + .i2c_engine = 1, + .i2c_port = 4, + .i2c_reset_addr = OCAPI_I2C_RESET_ADDR, + .i2c_reset_odl0 = OCAPI_I2C_RESET_BOTTOM, + .i2c_reset_odl1 = OCAPI_I2C_RESET_TOP, .i2c_presence_addr = OCAPI_I2C_PRESENCE_ADDR, .i2c_presence_odl0 = OCAPI_I2C_PRESENCE_BOTTOM, .i2c_presence_odl1 = OCAPI_I2C_PRESENCE_TOP, @@ -46,7 +49,7 @@ const struct platform_ocapi zz_ocapi = { * force the presence until all our systems are upgraded */ .force_presence = true, - .odl_phy_swap = true, + .odl_phy_swap = true, }; static bool zz_probe(void)