From patchwork Tue Mar 27 04:42:58 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Stewart Smith X-Patchwork-Id: 891379 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 409JhR0wlxz9ryr for ; Tue, 27 Mar 2018 15:59:19 +1100 (AEDT) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from bilbo.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 409JhQ6Zl0zF29K for ; Tue, 27 Mar 2018 15:59:18 +1100 (AEDT) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: lists.ozlabs.org; spf=none (mailfrom) smtp.mailfrom=linux.vnet.ibm.com (client-ip=148.163.158.5; helo=mx0a-001b2d01.pphosted.com; envelope-from=stewart@linux.vnet.ibm.com; receiver=) Authentication-Results: lists.ozlabs.org; dmarc=none (p=none dis=none) header.from=linux.vnet.ibm.com Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 409JKs5X3VzF285 for ; Tue, 27 Mar 2018 15:43:13 +1100 (AEDT) Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w2R4Z3MQ019843 for ; Tue, 27 Mar 2018 00:43:10 -0400 Received: from e35.co.us.ibm.com (e35.co.us.ibm.com [32.97.110.153]) by mx0b-001b2d01.pphosted.com with ESMTP id 2gyejch6us-1 (version=TLSv1.2 cipher=AES256-SHA256 bits=256 verify=NOT) for ; Tue, 27 Mar 2018 00:43:08 -0400 Received: from localhost by e35.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Mon, 26 Mar 2018 22:43:05 -0600 Received: from b03ledav004.gho.boulder.ibm.com (b03ledav004.gho.boulder.ibm.com [9.17.130.235]) by b03cxnp08025.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w2R4h4bh13435272; Mon, 26 Mar 2018 21:43:04 -0700 Received: from b03ledav004.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DB51978037; Mon, 26 Mar 2018 22:43:03 -0600 (MDT) Received: from birb.localdomain (unknown [9.81.192.6]) by b03ledav004.gho.boulder.ibm.com (Postfix) with SMTP id 04F5478041; Mon, 26 Mar 2018 22:43:01 -0600 (MDT) Received: by birb.localdomain (Postfix, from userid 1000) id 383844EC653; Tue, 27 Mar 2018 15:42:58 +1100 (AEDT) From: Stewart Smith To: skiboot@lists.ozlabs.org Date: Tue, 27 Mar 2018 15:42:58 +1100 X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180327044258.21876-1-stewart@linux.vnet.ibm.com> References: <20180327044258.21876-1-stewart@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18032704-0012-0000-0000-000015F4533B X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008751; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000255; SDB=6.01008983; UDB=6.00513952; IPR=6.00788265; MB=3.00020263; MTD=3.00000008; XFM=3.00000015; UTC=2018-03-27 04:43:06 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18032704-0013-0000-0000-00005208EDB6 Message-Id: <20180327044258.21876-2-stewart@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-03-27_02:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1803270049 Subject: [Skiboot] [PATCH 2/2] NPU2: dump NPU2 registers on npu2 HMI X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: rblack@us.ibm.com, zshelle@us.ibm.com, camille@us.ibm.com MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Due to the nature of debugging npu2 issues, folk are wanting the full list of NPU2 registers dumped when there's a problem. We have to list out each register as traversing the range triggers FIR bits that confuse PRD. Suggested-by: Ryan Black Signed-off-by: Stewart Smith --- core/hmi.c | 75 ++++++++++++++++++++++++++++++++++++++++++++++++++++++++++++-- 1 file changed, 73 insertions(+), 2 deletions(-) diff --git a/core/hmi.c b/core/hmi.c index 1a6d145c19db..162dd8a11253 100644 --- a/core/hmi.c +++ b/core/hmi.c @@ -1,4 +1,4 @@ -/* Copyright 2013-2014 IBM Corp. +/* Copyright 2013-2018 IBM Corp. * * Licensed under the Apache License, Version 2.0 (the "License"); * you may not use this file except in compliance with the License. @@ -29,6 +29,7 @@ #include #include #include +#include /* * HMER register layout: @@ -567,6 +568,59 @@ static void find_nx_checkstop_reason(int flat_chip_id, *event_generated = true; } +/* + * If the year is 2018 and you still see all these hardcoded, you + * should really replace this with the neat macros that's in the + * NPU2 code rather than this horrible listing of every single + * NPU2 register hardcoded for a specific chip. + * + * I feel dirty having even written it. + */ +static uint32_t npu2_scom_dump[] = { + 0x5011017, 0x5011047, 0x5011077, 0x50110A7, + 0x5011217, 0x5011247, 0x5011277, 0x50112A7, + 0x5011417, 0x5011447, 0x5011477, 0x50114A7, + 0x50110DA, 0x50112DA, 0x50114DA, + 0x50110DB, 0x50112DB, 0x50114DB, + 0x5011011, 0x5011041, 0x5011071, 0x50110A1, + 0x5011211, 0x5011241, 0x5011271, 0x50112A1, + 0x5011411, 0x5011441, 0x5011471, 0x50114A1, + 0x5011018, 0x5011048, 0x5011078, 0x50110A8, + 0x5011218, 0x5011248, 0x5011278, 0x50112A8, + 0x5011418, 0x5011448, 0x5011478, 0x50114A8, + 0x5011640, + 0x5011114, 0x5011134, 0x5011314, 0x5011334, + 0x5011514, 0x5011534, 0x5011118, 0x5011138, + 0x5011318, 0x5011338, 0x5011518, 0x5011538, + 0x50110D8, 0x50112D8, 0x50114D8, + 0x50110D9, 0x50112D9, 0x50114D9, + 0x5011019, 0x5011049, 0x5011079, 0x50110A9, + 0x5011219, 0x5011249, 0x5011279, 0x50112A9, + 0x5011419, 0x5011449, 0x5011479, 0x50114A9, + 0x50110F4, 0x50112F4, 0x50114F4, + 0x50110F5, 0x50112F5, 0x50114F5, + 0x50110F6, 0x50112F6, 0x50114F6, + 0x50110FD, 0x50112FD, 0x50114FD, + 0x50110FE, 0x50112FE, 0x50114FE, + 0x00 +}; + +static void dump_scoms(int flat_chip_id, const char *unit, uint32_t *scoms) +{ + uint64_t value; + int r; + + while (*scoms != 0) { + value = 0; + r = _xscom_read(flat_chip_id, *scoms, &value, false); + if (r != OPAL_SUCCESS) + continue; + prlog(PR_ERR, "%s: 0x%08x=0x%016llx\n", + unit, *scoms, value); + scoms++; + } +} + static void find_npu2_checkstop_reason(int flat_chip_id, struct OpalHMIEvent *hmi_evt, bool *event_generated) @@ -574,7 +628,7 @@ static void find_npu2_checkstop_reason(int flat_chip_id, struct phb *phb; struct npu *p = NULL; int i; - + bool npu2_hmi_verbose = false; uint64_t npu2_fir; uint64_t npu2_fir_mask; uint64_t npu2_fir_action0; @@ -636,6 +690,23 @@ static void find_npu2_checkstop_reason(int flat_chip_id, if (!total_errors) return; + npu2_hmi_verbose = nvram_query_eq("npu2-hmi-verbose", "true"); + /* Force this for now until we sort out something better */ + npu2_hmi_verbose = true; + + if (npu2_hmi_verbose) { + _xscom_lock(); + dump_scoms(flat_chip_id, "NPU2", npu2_scom_dump); + _xscom_unlock(); + prlog(PR_ERR, " _________________________ \n"); + prlog(PR_ERR, "< It's Driver Debug time! >\n"); + prlog(PR_ERR, " ------------------------- \n"); + prlog(PR_ERR, " \\ ,__, \n"); + prlog(PR_ERR, " \\ (oo)____ \n"); + prlog(PR_ERR, " (__) )\\ \n"); + prlog(PR_ERR, " ||--|| * \n"); + } + /* Set up the HMI event */ hmi_evt->severity = OpalHMI_SEV_WARNING; hmi_evt->type = OpalHMI_ERROR_MALFUNC_ALERT;