| Message ID | 20180302111219.1322-1-vaibhav@linux.vnet.ibm.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | capp: Make error in capp timebase sync a non-fatal error | expand |
On 02/03/18 22:12, Vaibhav Jain wrote: > Presently when we encounter an error while synchronizing capp timebase > with chip-tod at the end of enable_capi_mode() we return an > error. This has an to unintended consequences. First this will prevent > disabling of fast-reboot even though CAPP is already enabled by this > point. Secondly, failure during timebase sync is a non fatal error or > capp initialization as CAPP/PSL can continue working after this and an > AFU will only see an error when it tries to read the timebase value > from PSL. > > So this patch updates enable_capi_mode() to not return an error in > case call to chiptod_capp_timebase_sync() fails. The function will now > just log an error and continue further with capp init sequence. This > make the current implementation align with the one in kernel 'cxl' > driver which also assumes the PSL timebase sync errors as non-fatal > init error. > > Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com> Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> > --- > hw/phb4.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) > > diff --git a/hw/phb4.c b/hw/phb4.c > index 98595c61..8835e3de 100644 > --- a/hw/phb4.c > +++ b/hw/phb4.c > @@ -4019,10 +4019,8 @@ static int64_t enable_capi_mode(struct phb4 *p, uint64_t pe_number, > > if (!chiptod_capp_timebase_sync(p->chip_id, CAPP_TFMR, > CAPP_TB, > - PHB4_CAPP_REG_OFFSET(p))) { > + PHB4_CAPP_REG_OFFSET(p))) > PHBERR(p, "CAPP: Failed to sync timebase\n"); > - return OPAL_HARDWARE; > - } > > /* set callbacks to handle HMI events */ > capi_ops.get_capp_info = &phb4_get_capp_info; >
Vaibhav Jain <vaibhav@linux.vnet.ibm.com> writes: > Presently when we encounter an error while synchronizing capp timebase > with chip-tod at the end of enable_capi_mode() we return an > error. This has an to unintended consequences. First this will prevent > disabling of fast-reboot even though CAPP is already enabled by this > point. Secondly, failure during timebase sync is a non fatal error or > capp initialization as CAPP/PSL can continue working after this and an > AFU will only see an error when it tries to read the timebase value > from PSL. > > So this patch updates enable_capi_mode() to not return an error in > case call to chiptod_capp_timebase_sync() fails. The function will now > just log an error and continue further with capp init sequence. This > make the current implementation align with the one in kernel 'cxl' > driver which also assumes the PSL timebase sync errors as non-fatal > init error. > > Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com> > --- > hw/phb4.c | 4 +--- > 1 file changed, 1 insertion(+), 3 deletions(-) Merged to master as of a72d055d93378e934df38a4bb1787e427fbf21cf
diff --git a/hw/phb4.c b/hw/phb4.c index 98595c61..8835e3de 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -4019,10 +4019,8 @@ static int64_t enable_capi_mode(struct phb4 *p, uint64_t pe_number, if (!chiptod_capp_timebase_sync(p->chip_id, CAPP_TFMR, CAPP_TB, - PHB4_CAPP_REG_OFFSET(p))) { + PHB4_CAPP_REG_OFFSET(p))) PHBERR(p, "CAPP: Failed to sync timebase\n"); - return OPAL_HARDWARE; - } /* set callbacks to handle HMI events */ capi_ops.get_capp_info = &phb4_get_capp_info;
Presently when we encounter an error while synchronizing capp timebase with chip-tod at the end of enable_capi_mode() we return an error. This has an to unintended consequences. First this will prevent disabling of fast-reboot even though CAPP is already enabled by this point. Secondly, failure during timebase sync is a non fatal error or capp initialization as CAPP/PSL can continue working after this and an AFU will only see an error when it tries to read the timebase value from PSL. So this patch updates enable_capi_mode() to not return an error in case call to chiptod_capp_timebase_sync() fails. The function will now just log an error and continue further with capp init sequence. This make the current implementation align with the one in kernel 'cxl' driver which also assumes the PSL timebase sync errors as non-fatal init error. Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com> --- hw/phb4.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-)