| Message ID | 20180116060610.8243-1-vaibhav@linux.vnet.ibm.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | capi: Disable CAPP virtual machines | expand |
On 16/01/18 17:06, Vaibhav Jain wrote: > When exercising more than one CAPI accelerators simultaneously in > cache coherency mode, the verification team is seeing a deadlock. To > fix this a workaround of disabling CAPP virtual machines is > suggested. So this patch updates CAPP APC Master Powerbus control > register during CAPP init to also set Bit(12) that disables CAPP > virtual machines. > > Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com> What's a "virtual machine" mean in this context? The SCOM documentation says that bit disables PSL command queues - I think I can take a guess at what a "virtual machine" is given that information, but some more context would be helpful. > --- > hw/phb4.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/hw/phb4.c b/hw/phb4.c > index ff912e1f..8e660b66 100644 > --- a/hw/phb4.c > +++ b/hw/phb4.c > @@ -3581,6 +3581,7 @@ static void phb4_init_capp_regs(struct phb4 *p, uint32_t capp_eng) > xscom_read(p->chip_id, APC_MASTER_PB_CTRL + offset, ®); > reg |= PPC_BIT(0); /* enable cResp exam */ > reg |= PPC_BIT(3); /* disable vg not sys */ > + reg |= PPC_BIT(12);/* HW417025: disable capp virtual machines */ > if (p->rev == PHB4_REV_NIMBUS_DD10) { > reg |= PPC_BIT(1); > } else { >
Andrew Donnellan <andrew.donnellan@au1.ibm.com> writes: > What's a "virtual machine" mean in this context? The SCOM documentation > says that bit disables PSL command queues - I think I can take a guess > at what a "virtual machine" is given that information, but some more > context would be helpful. Thanks for reviewing this patch Andrew. I have re-sent this patch with an updated patch description with info on 'what capp virtual machines are ?' and 'why we are disabling them for the time being ?'.
diff --git a/hw/phb4.c b/hw/phb4.c index ff912e1f..8e660b66 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -3581,6 +3581,7 @@ static void phb4_init_capp_regs(struct phb4 *p, uint32_t capp_eng) xscom_read(p->chip_id, APC_MASTER_PB_CTRL + offset, ®); reg |= PPC_BIT(0); /* enable cResp exam */ reg |= PPC_BIT(3); /* disable vg not sys */ + reg |= PPC_BIT(12);/* HW417025: disable capp virtual machines */ if (p->rev == PHB4_REV_NIMBUS_DD10) { reg |= PPC_BIT(1); } else {
When exercising more than one CAPI accelerators simultaneously in cache coherency mode, the verification team is seeing a deadlock. To fix this a workaround of disabling CAPP virtual machines is suggested. So this patch updates CAPP APC Master Powerbus control register during CAPP init to also set Bit(12) that disables CAPP virtual machines. Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com> --- hw/phb4.c | 1 + 1 file changed, 1 insertion(+)