| Message ID | 20171108071059.20058-1-oohall@gmail.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | asm/head: Loop after attn | expand |
Oliver O'Halloran <oohall@gmail.com> writes: > We use the attn instruction to raise an error in early boot if OPAL > don't recognise the PVR. It's possible for hostboot to disable the > attn instruction before entering OPAL so add an extra busy loop after > the attn to prevent attempting to boot on an unknown processor. > > Signed-off-by: Oliver O'Halloran <oohall@gmail.com> > --- > asm/head.S | 1 + > 1 file changed, 1 insertion(+) Makes sense. Merged to master as of 370b8866871b5c2cf3286afbf19fc90282cb3508
diff --git a/asm/head.S b/asm/head.S index d82e4e5e7c66..ccf0948273d2 100644 --- a/asm/head.S +++ b/asm/head.S @@ -270,6 +270,7 @@ boot_entry: cmpwi cr0,%r3,PVR_TYPE_P9 beq 1f attn /* Unsupported CPU type... what do we do ? */ + b . /* loop here, just in case attn is disabled */ /* P8 -> 8 threads */ 2: li %r26,7
We use the attn instruction to raise an error in early boot if OPAL don't recognise the PVR. It's possible for hostboot to disable the attn instruction before entering OPAL so add an extra busy loop after the attn to prevent attempting to boot on an unknown processor. Signed-off-by: Oliver O'Halloran <oohall@gmail.com> --- asm/head.S | 1 + 1 file changed, 1 insertion(+)