From patchwork Sun Sep 10 07:33:17 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benjamin Herrenschmidt X-Patchwork-Id: 812048 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xqjVh4gQlz9sQl for ; Sun, 10 Sep 2017 17:34:20 +1000 (AEST) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3xqjVh3WvKzDrch for ; Sun, 10 Sep 2017 17:34:20 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Authentication-Results: ozlabs.org; spf=permerror (mailfrom) smtp.mailfrom=kernel.crashing.org (client-ip=63.228.1.57; helo=gate.crashing.org; envelope-from=benh@kernel.crashing.org; receiver=) Received: from gate.crashing.org (gate.crashing.org [63.228.1.57]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3xqjVD0zrYzDrcj for ; Sun, 10 Sep 2017 17:33:55 +1000 (AEST) Received: from pasglop.au.ibm.com (localhost.localdomain [127.0.0.1]) by gate.crashing.org (8.14.1/8.13.8) with ESMTP id v8A7XVah032370; Sun, 10 Sep 2017 02:33:32 -0500 From: Benjamin Herrenschmidt To: skiboot@lists.ozlabs.org Date: Sun, 10 Sep 2017 17:33:17 +1000 Message-Id: <20170910073330.25824-1-benh@kernel.crashing.org> X-Mailer: git-send-email 2.13.5 Subject: [Skiboot] [PATCH v2 01/14] xive: Remove useless memory barriers in VP/EQ inits X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" We no longer update "live" memory structures, we use a temporary copy on the stack and update the actual memory structure using the cache watch, so those barriers are pointless. Signed-off-by: Benjamin Herrenschmidt --- hw/xive.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/hw/xive.c b/hw/xive.c index e478efc1..fb9257e3 100644 --- a/hw/xive.c +++ b/hw/xive.c @@ -887,7 +887,6 @@ static void xive_init_default_vp(struct xive_vp *vp, */ vp->w1 = (eq_blk << 28) | eq_idx; vp->w5 = 0xff000000; - lwsync(); vp->w0 = VP_W0_VALID; } @@ -903,7 +902,6 @@ static void xive_init_emu_eq(uint32_t vp_blk, uint32_t vp_idx, eq->w6 = SETFIELD(EQ_W6_NVT_BLOCK, 0ul, vp_blk) | SETFIELD(EQ_W6_NVT_INDEX, 0ul, vp_idx); eq->w7 = SETFIELD(EQ_W7_F0_PRIORITY, 0ul, prio); - eieio(); eq->w0 = EQ_W0_VALID | EQ_W0_ENQUEUE | SETFIELD(EQ_W0_QSIZE, 0ul, EQ_QSIZE_64K) | EQ_W0_FIRMWARE;