diff mbox series

capi: Mask Psl Credit timeout error for P9

Message ID 20170905113156.2851-1-vaibhav@linux.vnet.ibm.com
State Changes Requested
Headers show
Series capi: Mask Psl Credit timeout error for P9 | expand

Commit Message

Vaibhav Jain Sept. 5, 2017, 11:31 a.m. UTC
Mask the PSL credit timeout error in CAPP FIR Mask register
bit(46). As per the h/w team this error is now deprecated and shouldn't
cause any fir-action for P9.

Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
---
 hw/phb4.c | 5 +++++
 1 file changed, 5 insertions(+)

Comments

Stewart Smith Sept. 5, 2017, 11:45 a.m. UTC | #1
Vaibhav Jain <vaibhav@linux.vnet.ibm.com> writes:
> Mask the PSL credit timeout error in CAPP FIR Mask register
> bit(46). As per the h/w team this error is now deprecated and shouldn't
> cause any fir-action for P9.
>
> Signed-off-by: Vaibhav Jain <vaibhav@linux.vnet.ibm.com>
> ---
>  hw/phb4.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/hw/phb4.c b/hw/phb4.c
> index 1e148e0b..cddb8521 100644
> --- a/hw/phb4.c
> +++ b/hw/phb4.c
> @@ -3431,6 +3431,11 @@ static void phb4_init_capp_regs(struct phb4 *p)
>  			    0xFFFFF00E00000000);
>  	}
>  
> +	/* Mask the CAPP PSL Credit Timeout Register error */
> +	xscom_read(p->chip_id, CAPP_FIR_MASK + offset, &reg);
> +	reg |= PPC_BIT(46);
> +	xscom_write(p->chip_id, CAPP_FIR_MASK + offset, reg);
> +
>  	/* Deassert TLBI_FENCED and tlbi_psl_is_dead */
>  	xscom_write(p->chip_id, CAPP_ERR_STATUS_CTRL + offset, 0);

This looks like a prime candidate for xscom_write_mask() that Alistair
introduced in:
commit e3f7d42c77bfc3b899d3d636b372e1292b790656
Author: Alistair Popple <alistair@popple.id.au>
Date:   Fri Aug 4 14:15:19 2017 +1000

    xscom: Add xscom_write_mask() function
    
    It is common for xscom registers to only contain specific bit fields that
    need to be modified without altering the rest of the register. This adds a
    convenience function to perform xscom read-modify-write operations under a
    mask.
Vaibhav Jain Sept. 6, 2017, 6:47 a.m. UTC | #2
Stewart Smith <stewart@linux.vnet.ibm.com> writes:

>> +	/* Mask the CAPP PSL Credit Timeout Register error */
>> +	xscom_read(p->chip_id, CAPP_FIR_MASK + offset, &reg);
>> +	reg |= PPC_BIT(46);
>> +	xscom_write(p->chip_id, CAPP_FIR_MASK + offset, reg);
>> +
>>  	/* Deassert TLBI_FENCED and tlbi_psl_is_dead */
>>  	xscom_write(p->chip_id, CAPP_ERR_STATUS_CTRL + offset, 0);
>
> This looks like a prime candidate for xscom_write_mask() that Alistair
> introduced in:

Thanks for pointing to this new function Steward. I will send a v2 with
the update.
Andrew Donnellan Sept. 6, 2017, 9:22 a.m. UTC | #3
On 05/09/17 21:45, Stewart Smith wrote:
> This looks like a prime candidate for xscom_write_mask() that Alistair
> introduced in:
> commit e3f7d42c77bfc3b899d3d636b372e1292b790656
> Author: Alistair Popple <alistair@popple.id.au>
> Date:   Fri Aug 4 14:15:19 2017 +1000
> 
>      xscom: Add xscom_write_mask() function
>      
>      It is common for xscom registers to only contain specific bit fields that
>      need to be modified without altering the rest of the register. This adds a
>      convenience function to perform xscom read-modify-write operations under a
>      mask.
> 
> 


Hmm, I wonder if Coccinelle could help here...
Stewart Smith Sept. 7, 2017, 6:08 a.m. UTC | #4
Andrew Donnellan <andrew.donnellan@au1.ibm.com> writes:
> On 05/09/17 21:45, Stewart Smith wrote:
>> This looks like a prime candidate for xscom_write_mask() that Alistair
>> introduced in:
>> commit e3f7d42c77bfc3b899d3d636b372e1292b790656
>> Author: Alistair Popple <alistair@popple.id.au>
>> Date:   Fri Aug 4 14:15:19 2017 +1000
>> 
>>      xscom: Add xscom_write_mask() function
>>      
>>      It is common for xscom registers to only contain specific bit fields that
>>      need to be modified without altering the rest of the register. This adds a
>>      convenience function to perform xscom read-modify-write operations under a
>>      mask.
>> 
>> 
>
>
> Hmm, I wonder if Coccinelle could help here...

Yeah, it could. I've started to poke at it a bit more, but I'm not
convinced I would get it right for
not-directly-copying-and-hacking-a-trivial-example yet :)
diff mbox series

Patch

diff --git a/hw/phb4.c b/hw/phb4.c
index 1e148e0b..cddb8521 100644
--- a/hw/phb4.c
+++ b/hw/phb4.c
@@ -3431,6 +3431,11 @@  static void phb4_init_capp_regs(struct phb4 *p)
 			    0xFFFFF00E00000000);
 	}
 
+	/* Mask the CAPP PSL Credit Timeout Register error */
+	xscom_read(p->chip_id, CAPP_FIR_MASK + offset, &reg);
+	reg |= PPC_BIT(46);
+	xscom_write(p->chip_id, CAPP_FIR_MASK + offset, reg);
+
 	/* Deassert TLBI_FENCED and tlbi_psl_is_dead */
 	xscom_write(p->chip_id, CAPP_ERR_STATUS_CTRL + offset, 0);
 }