From patchwork Wed Aug 16 23:49:14 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Thiago Jung Bauermann X-Patchwork-Id: 802276 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher ADH-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xXmKV1jg5z9sPr for ; Thu, 17 Aug 2017 09:49:34 +1000 (AEST) Received: from lists.ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 3xXmKV0Vy7zDrJp for ; Thu, 17 Aug 2017 09:49:34 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from mx0a-001b2d01.pphosted.com (mx0b-001b2d01.pphosted.com [148.163.158.5]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id 3xXmKK5GgyzDr9F for ; Thu, 17 Aug 2017 09:49:25 +1000 (AEST) Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.21/8.16.0.21) with SMTP id v7GNn0hZ071184 for ; Wed, 16 Aug 2017 19:49:22 -0400 Received: from e12.ny.us.ibm.com (e12.ny.us.ibm.com [129.33.205.202]) by mx0b-001b2d01.pphosted.com with ESMTP id 2ccu5xn88x-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Wed, 16 Aug 2017 19:49:22 -0400 Received: from localhost by e12.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Wed, 16 Aug 2017 19:49:19 -0400 Received: from b01ledav005.gho.pok.ibm.com (b01ledav005.gho.pok.ibm.com [9.57.199.110]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id v7GNnJ7333226766; Wed, 16 Aug 2017 23:49:19 GMT Received: from b01ledav005.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 87EB2AE03B; Wed, 16 Aug 2017 19:49:38 -0400 (EDT) Received: from morokweng.ibm.com (unknown [9.80.237.229]) by b01ledav005.gho.pok.ibm.com (Postfix) with ESMTP id 36378AE034; Wed, 16 Aug 2017 19:49:37 -0400 (EDT) From: Thiago Jung Bauermann To: skiboot@lists.ozlabs.org Date: Wed, 16 Aug 2017 20:49:14 -0300 X-Mailer: git-send-email 2.14.1 MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 17081623-0048-0000-0000-000001D4AAF4 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00007557; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000221; SDB=6.00903359; UDB=6.00452529; IPR=6.00683576; BA=6.00005537; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00016730; XFM=3.00000015; UTC=2017-08-16 23:49:21 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 17081623-0049-0000-0000-00004241F038 Message-Id: <20170816234914.10494-1-bauerman@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2017-08-16_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 spamscore=0 suspectscore=1 malwarescore=0 phishscore=0 adultscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1707230000 definitions=main-1708160389 Subject: [Skiboot] [PATCH] core/init: Add ibm, processor-storage-keys property to CPU DT node. X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paul Mackerras Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" LoPAPR says: “ibm,processor-storage-keys” property name indicating the number of virtual storage keys supported by the processor described by this node. prop-encoded-array: Consists of two cells encoded as with encode-int. The first cell represents the number of virtual storage keys supported for data accesses while the second cell represents the number of virtual storage keys supported for instruction accesses. The cell value of zero indicates that no storage keys are supported for the access type. pHyp provides the property above but there's a bug in P8 firmware where the second cell is zero even though POWER8 supports instruction access keys. This bug will be fixed for P9. While this is a PAPR property, it's useful to have it in powernv as well so that Linux has a uniform way of checking for the feature regardless of the platform it's running on. Tested on QEMU POWER8 powernv model, Mambo P9 and POWER8 Firenze machine. Signed-off-by: Thiago Jung Bauermann --- This is used by patch 25 of Ram Pai's series which makes Linux support storage keys: https://lists.ozlabs.org/pipermail/linuxppc-dev/2017-July/161230.html I will submit a patch for KVM so that it can pass the property along to its guests in the next few days. core/init.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+) diff --git a/core/init.c b/core/init.c index 61b531c77e39..405aa01af9d9 100644 --- a/core/init.c +++ b/core/init.c @@ -560,6 +560,29 @@ void __noreturn load_and_boot_kernel(bool is_reboot) start_kernel(kernel_entry, fdt, mem_top); } +static void storage_keys_fixup(void) +{ + /* P7 doesn't support instruction access keys. */ + const u32 insn_keys = (proc_gen == proc_gen_p7) ? 0 : 32; + struct dt_node *cpus, *n; + + cpus = dt_find_by_path(dt_root, "/cpus"); + assert(cpus); + + if (proc_gen == proc_gen_unknown) + return; + + dt_for_each_child(cpus, n) { + /* There may be cache nodes in /cpus. */ + if (!dt_has_node_property(n, "device_type", "cpu") || + dt_has_node_property(n, "ibm,processor-storage-keys", NULL)) + continue; + + dt_add_property_cells(n, "ibm,processor-storage-keys", 32, + insn_keys); + } +} + static void dt_fixups(void) { struct dt_node *n; @@ -587,6 +610,8 @@ static void dt_fixups(void) if (!dt_has_node_property(n, "scom-controller", NULL)) dt_add_property(n, "scom-controller", NULL, 0); } + + storage_keys_fixup(); } static void add_arch_vector(void)