| Message ID | 20170620095026.1569-1-mikey@neuling.org |
|---|---|
| State | Accepted |
| Headers | show |
Michael Neuling <mikey@neuling.org> writes: > Currently if we read all 1's from the EEH or IRQ capabilities, we end > up train wrecking on some other random code (eg. an assert() in xive). > > This hardens the PHB4 code to look for these bad reads and more > gracefully fails the init for that PHB alone. This allows the rest of > the system to boot and ignore those bad PHBs. > > Signed-off-by: Michael Neuling <mikey@neuling.org> > --- > hw/phb4.c | 8 ++++++++ > 1 file changed, 8 insertions(+) Merged to master as of 23d759f80925d65fd59c16552467c85cc2c5090f
diff --git a/hw/phb4.c b/hw/phb4.c index e56a3f44cb..79b6462653 100644 --- a/hw/phb4.c +++ b/hw/phb4.c @@ -3563,6 +3563,10 @@ static bool phb4_read_capabilities(struct phb4 *p) /* Read EEH capabilities */ val = in_be64(p->regs + PHB_PHB4_EEH_CAP); + if (val == 0xffffffffffffffff) { + PHBERR(p, "Failed to read EEH cap, PHB appears broken\n"); + return false; + } p->max_num_pes = val >> 52; if (p->max_num_pes >= 512) { p->mrt_size = 16; @@ -3575,6 +3579,10 @@ static bool phb4_read_capabilities(struct phb4 *p) } val = in_be64(p->regs + PHB_PHB4_IRQ_CAP); + if (val == 0xffffffffffffffff) { + PHBERR(p, "Failed to read IRQ cap, PHB appears broken\n"); + return false; + } p->num_irqs = val & 0xffff; /* This works for 512 PEs. FIXME calculate for any hardware
Currently if we read all 1's from the EEH or IRQ capabilities, we end up train wrecking on some other random code (eg. an assert() in xive). This hardens the PHB4 code to look for these bad reads and more gracefully fails the init for that PHB alone. This allows the rest of the system to boot and ignore those bad PHBs. Signed-off-by: Michael Neuling <mikey@neuling.org> --- hw/phb4.c | 8 ++++++++ 1 file changed, 8 insertions(+)