diff --git a/asm/head.S b/asm/head.S
index 803fbf1..1189fc4 100644
--- a/asm/head.S
+++ b/asm/head.S
@@ -278,6 +278,8 @@ boot_entry:
 	beq	2f
 	cmpwi	cr0,%r3,PVR_TYPE_P9
 	beq 	1f
+	cmpwi	cr0,%r3,PVR_TYPE_P9P
+	beq 	1f
 	attn		/* Unsupported CPU type... what do we do ? */
 	b 	.	/* loop here, just in case attn is disabled */
 
@@ -733,6 +735,8 @@ init_shared_sprs:
 	beq	3f
 	cmpwi	cr0,%r3,PVR_TYPE_P9
 	beq	4f
+	cmpwi	cr0,%r3,PVR_TYPE_P9P
+	beq	4f
 	/* Unsupported CPU type... what do we do ? */
 	b	9f
 
@@ -830,6 +834,8 @@ init_replicated_sprs:
 	beq	3f
 	cmpwi	cr0,%r3,PVR_TYPE_P9
 	beq	4f
+	cmpwi	cr0,%r3,PVR_TYPE_P9P
+	beq	4f
 	/* Unsupported CPU type... what do we do ? */
 	b	9f
 
diff --git a/asm/misc.S b/asm/misc.S
index 381590b..6ef11a3 100644
--- a/asm/misc.S
+++ b/asm/misc.S
@@ -73,10 +73,13 @@ cleanup_global_tlb:
 	mfspr	%r3,SPR_PVR
 	srdi	%r3,%r3,16
 	cmpwi	cr0,%r3,PVR_TYPE_P9
-	bnelr
+	beq	cr0,1f
+	cmpwi	cr0,%r3,PVR_TYPE_P9P
+	beq	cr0,1f
+	blr
 
 	/* Sync out previous updates */
-	ptesync
+1:	ptesync
 
 #ifndef OLD_BINUTILS
 	.machine "power9"
diff --git a/core/cpu.c b/core/cpu.c
index 36655fe..a0ed1c5 100644
--- a/core/cpu.c
+++ b/core/cpu.c
@@ -971,6 +971,7 @@ void init_boot_cpu(void)
 		hid0_attn = SPR_HID0_POWER8_ENABLE_ATTN;
 		break;
 	case PVR_TYPE_P9:
+	case PVR_TYPE_P9P:
 		proc_gen = proc_gen_p9;
 		hile_supported = true;
 		radix_supported = true;
diff --git a/core/cpufeatures.c b/core/cpufeatures.c
index 1daa017..77a66f8 100644
--- a/core/cpufeatures.c
+++ b/core/cpufeatures.c
@@ -57,9 +57,10 @@
 #define CPU_P8_DD2	(1U << 1)
 #define CPU_P9_DD1	(1U << 2)
 #define CPU_P9_DD2	(1U << 3)
+#define CPU_P9P		(1U << 4)
 
 #define CPU_P8		(CPU_P8_DD1|CPU_P8_DD2)
-#define CPU_P9		(CPU_P9_DD1|CPU_P9_DD2)
+#define CPU_P9		(CPU_P9_DD1|CPU_P9_DD2|CPU_P9P)
 #define CPU_ALL		(CPU_P8|CPU_P9)
 
 struct cpu_feature {
@@ -909,6 +910,13 @@ void dt_add_cpufeatures(struct dt_node *root)
 		}
 
 		break;
+	case PVR_TYPE_P9P:
+		if (!cpu_name)
+			cpu_name = "POWER9P";
+
+		cpu_feature_isa = ISA_V3_0B;
+		cpu_feature_cpu = CPU_P9P;
+		break;
 	default:
 		return;
 	}
diff --git a/doc/platforms-and-cpus.rst b/doc/platforms-and-cpus.rst
index 13b03b0..7d11d30 100644
--- a/doc/platforms-and-cpus.rst
+++ b/doc/platforms-and-cpus.rst
@@ -16,6 +16,7 @@ Power9N         0x004e0xxx      Nimbus 12 small core
 Power9N         0x004e1xxx      Nimbus 24 small core
 Power9C         0x004e2xxx      Cumulus 12 small core
 Power9C         0x004e3xxx      Cumulus 24 small core
+Power9P         0x004fxxxx      Axone
 =============== =============== =====================
 
 Platforms
diff --git a/external/xscom-utils/sram.c b/external/xscom-utils/sram.c
index 9332e20..52f92b8 100644
--- a/external/xscom-utils/sram.c
+++ b/external/xscom-utils/sram.c
@@ -40,6 +40,7 @@
 #define PVR_TYPE_P8     0x004d /* Venice */
 #define PVR_TYPE_P8NVL  0x004c /* Naples */
 #define PVR_TYPE_P9     0x004e
+#define PVR_TYPE_P9P    0x004f /* Axone */
 
 #ifdef __powerpc__
 static uint64_t get_xscom_base(void)
@@ -50,6 +51,7 @@ static uint64_t get_xscom_base(void)
 
 	switch (pvr >> 16) {
 	case PVR_TYPE_P9:
+	case PVR_TYPE_P9P:
 		return OCB_PIB_BASE_P9;
 
 	case PVR_TYPE_P8E:
diff --git a/hdata/cpu-common.c b/hdata/cpu-common.c
index a2ac062..f6dda4e 100644
--- a/hdata/cpu-common.c
+++ b/hdata/cpu-common.c
@@ -98,6 +98,7 @@ struct dt_node * add_core_common(struct dt_node *cpus,
 		pa_features_size = sizeof(pa_features_p8);
 		break;
 	case PVR_TYPE_P9:
+	case PVR_TYPE_P9P:
 		name = "PowerPC,POWER9";
 		if (is_power9n(version) &&
 			   (PVR_VERS_MAJ(version) == 2) &&
diff --git a/hdata/memory.c b/hdata/memory.c
index 7d5f3b3..a36337b 100644
--- a/hdata/memory.c
+++ b/hdata/memory.c
@@ -428,10 +428,10 @@ static void add_memory_controller(const struct HDIF_common_hdr *msarea,
 
 	/*
 	 * Memory hierarchy may change between processor version. Presently
-	 * its creating memory hierarchy for P9 (Nimbus) only.
+	 * it's only creating memory hierarchy for P9 (Nimbus) and P9P (Axone).
 	 */
 	version = PVR_TYPE(mfspr(SPR_PVR));
-	if (version != PVR_TYPE_P9)
+	if (version != PVR_TYPE_P9 && version != PVR_TYPE_P9P)
 		return;
 
 	chip_id = pcid_to_chip_id(be32_to_cpu(arange->chip));
diff --git a/hdata/test/hdata_to_dt.c b/hdata/test/hdata_to_dt.c
index c75a4ad..fd2957c 100644
--- a/hdata/test/hdata_to_dt.c
+++ b/hdata/test/hdata_to_dt.c
@@ -69,12 +69,14 @@ unsigned long tb_hz = 512000000;
 #define PVR_TYPE_P8	0x004d
 #define PVR_TYPE_P8NVL	0x004c
 #define PVR_TYPE_P9	0x004e
+#define PVR_TYPE_P9P	0x004f
 #define PVR_P7		0x003f0201
 #define PVR_P7P		0x004a0201
 #define PVR_P8E		0x004b0201
 #define PVR_P8		0x004d0200
 #define PVR_P8NVL	0x004c0100
 #define PVR_P9		0x004e0200
+#define PVR_P9P		0x004f0100
 
 #define SPR_PVR		0x11f	/* RO: Processor version register */
 
@@ -299,6 +301,10 @@ int main(int argc, char *argv[])
 			fake_pvr = PVR_P9;
 			proc_gen = proc_gen_p9;
 			opt_count++;
+		} else if (strcmp(argv[i], "-9P") == 0) {
+			fake_pvr = PVR_P9P;
+			proc_gen = proc_gen_p9;
+			opt_count++;
 		}
 	}
 
diff --git a/hw/xscom.c b/hw/xscom.c
index 5638f4d..37f0705 100644
--- a/hw/xscom.c
+++ b/hw/xscom.c
@@ -779,6 +779,10 @@ static void xscom_init_chip_info(struct proc_chip *chip)
 		chip->type = PROC_CHIP_P9_CUMULUS;
 		assert(proc_gen == proc_gen_p9);
 		break;
+	case 0xd9:
+		chip->type = PROC_CHIP_P9P;
+		assert(proc_gen == proc_gen_p9);
+		break;
 	default:
 		printf("CHIP: Unknown chip type 0x%02x !!!\n",
 		       (unsigned char)(val & 0xff));
diff --git a/include/chip.h b/include/chip.h
index c759d0a..d6e7e35 100644
--- a/include/chip.h
+++ b/include/chip.h
@@ -125,6 +125,7 @@ enum proc_chip_type {
 	PROC_CHIP_P8_NAPLES,
 	PROC_CHIP_P9_NIMBUS,
 	PROC_CHIP_P9_CUMULUS,
+	PROC_CHIP_P9P,
 };
 
 /* Simulator quirks */
diff --git a/include/processor.h b/include/processor.h
index 6b262b4..f6b227d 100644
--- a/include/processor.h
+++ b/include/processor.h
@@ -201,6 +201,7 @@
 #define PVR_TYPE_P8	0x004d /* Venice */
 #define PVR_TYPE_P8NVL	0x004c /* Naples */
 #define PVR_TYPE_P9	0x004e
+#define PVR_TYPE_P9P	0x004f /* Axone */
 
 #ifdef __ASSEMBLY__
 
