| Message ID | 1505352877-12793-1-git-send-email-arbab@linux.vnet.ibm.com |
|---|---|
| State | Accepted |
| Headers | show |
| Series | npu2: hw-procedures: Add settings to PHY_RESET | expand |
On 14/09/17 11:34, Reza Arbab wrote: > Set a few new values in the PHY_RESET procedure, as specified by our > updated programming guide documentation. > > Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com> Looks correct to me (I haven't double checked the reg offsets though). Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com> > --- > hw/npu2-hw-procedures.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) > > diff --git a/hw/npu2-hw-procedures.c b/hw/npu2-hw-procedures.c > index 7617962..7a5d188 100644 > --- a/hw/npu2-hw-procedures.c > +++ b/hw/npu2-hw-procedures.c > @@ -61,6 +61,11 @@ struct npu2_phy_reg NPU2_PHY_TX_RXCAL = {0x103, 57, 1}; > struct npu2_phy_reg NPU2_PHY_RX_INIT_DONE = {0x0ca, 48, 1}; > struct npu2_phy_reg NPU2_PHY_RX_PR_EDGE_TRACK_CNTL = {0x092, 48, 2}; > struct npu2_phy_reg NPU2_PHY_RX_PR_FW_OFF = {0x08a, 56, 1}; > +struct npu2_phy_reg NPU2_PHY_RX_PR_FW_INERTIA_AMT = {0x08a, 57, 3}; > +struct npu2_phy_reg NPU2_PHY_RX_CFG_LTE_MC = {0x000, 60, 4}; > +struct npu2_phy_reg NPU2_PHY_RX_A_INTEG_COARSE_GAIN = {0x00a, 48, 4}; > +struct npu2_phy_reg NPU2_PHY_RX_B_INTEG_COARSE_GAIN = {0x026, 48, 4}; > +struct npu2_phy_reg NPU2_PHY_RX_E_INTEG_COARSE_GAIN = {0x030, 48, 4}; > > /* These registers are per-PHY, not per lane */ > struct npu2_phy_reg NPU2_PHY_TX_ZCAL_SWO_EN = {0x3c9, 48, 1}; > @@ -308,6 +313,11 @@ static uint32_t phy_reset_complete(struct npu2_dev *ndev) > phy_write_lane(ndev, &NPU2_PHY_RX_PR_IQ_RES_SEL, lane, 0x7); > phy_write_lane(ndev, &NPU2_PHY_RX_PR_PHASE_STEP, lane, 0xc); > phy_write_lane(ndev, &NPU2_PHY_TX_LANE_PDWN, lane, 0); > + phy_write_lane(ndev, &NPU2_PHY_RX_PR_FW_INERTIA_AMT, lane, 4); > + phy_write_lane(ndev, &NPU2_PHY_RX_CFG_LTE_MC, lane, 3); > + phy_write_lane(ndev, &NPU2_PHY_RX_A_INTEG_COARSE_GAIN, lane, 11); > + phy_write_lane(ndev, &NPU2_PHY_RX_B_INTEG_COARSE_GAIN, lane, 11); > + phy_write_lane(ndev, &NPU2_PHY_RX_E_INTEG_COARSE_GAIN, lane, 11) > } > > return PROCEDURE_COMPLETE; >
Reza Arbab <arbab@linux.vnet.ibm.com> writes: > Set a few new values in the PHY_RESET procedure, as specified by our > updated programming guide documentation. > > Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com> > --- > hw/npu2-hw-procedures.c | 10 ++++++++++ > 1 file changed, 10 insertions(+) Thanks, merged to master as of 398a981236418377485f912924dc6800d4d773d2
diff --git a/hw/npu2-hw-procedures.c b/hw/npu2-hw-procedures.c index 7617962..7a5d188 100644 --- a/hw/npu2-hw-procedures.c +++ b/hw/npu2-hw-procedures.c @@ -61,6 +61,11 @@ struct npu2_phy_reg NPU2_PHY_TX_RXCAL = {0x103, 57, 1}; struct npu2_phy_reg NPU2_PHY_RX_INIT_DONE = {0x0ca, 48, 1}; struct npu2_phy_reg NPU2_PHY_RX_PR_EDGE_TRACK_CNTL = {0x092, 48, 2}; struct npu2_phy_reg NPU2_PHY_RX_PR_FW_OFF = {0x08a, 56, 1}; +struct npu2_phy_reg NPU2_PHY_RX_PR_FW_INERTIA_AMT = {0x08a, 57, 3}; +struct npu2_phy_reg NPU2_PHY_RX_CFG_LTE_MC = {0x000, 60, 4}; +struct npu2_phy_reg NPU2_PHY_RX_A_INTEG_COARSE_GAIN = {0x00a, 48, 4}; +struct npu2_phy_reg NPU2_PHY_RX_B_INTEG_COARSE_GAIN = {0x026, 48, 4}; +struct npu2_phy_reg NPU2_PHY_RX_E_INTEG_COARSE_GAIN = {0x030, 48, 4}; /* These registers are per-PHY, not per lane */ struct npu2_phy_reg NPU2_PHY_TX_ZCAL_SWO_EN = {0x3c9, 48, 1}; @@ -308,6 +313,11 @@ static uint32_t phy_reset_complete(struct npu2_dev *ndev) phy_write_lane(ndev, &NPU2_PHY_RX_PR_IQ_RES_SEL, lane, 0x7); phy_write_lane(ndev, &NPU2_PHY_RX_PR_PHASE_STEP, lane, 0xc); phy_write_lane(ndev, &NPU2_PHY_TX_LANE_PDWN, lane, 0); + phy_write_lane(ndev, &NPU2_PHY_RX_PR_FW_INERTIA_AMT, lane, 4); + phy_write_lane(ndev, &NPU2_PHY_RX_CFG_LTE_MC, lane, 3); + phy_write_lane(ndev, &NPU2_PHY_RX_A_INTEG_COARSE_GAIN, lane, 11); + phy_write_lane(ndev, &NPU2_PHY_RX_B_INTEG_COARSE_GAIN, lane, 11); + phy_write_lane(ndev, &NPU2_PHY_RX_E_INTEG_COARSE_GAIN, lane, 11); } return PROCEDURE_COMPLETE;
Set a few new values in the PHY_RESET procedure, as specified by our updated programming guide documentation. Signed-off-by: Reza Arbab <arbab@linux.vnet.ibm.com> --- hw/npu2-hw-procedures.c | 10 ++++++++++ 1 file changed, 10 insertions(+)