[2/4] capi: Move phb3 capp registers to specialized files

The definitions of the CAPP registers for PHB3 are moved in a specific
file.
The updated file capp.h will be used for the common functionalities
about the CAPP for PHB3 and PHB4.

Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>
---
 core/hmi.c          |  2 +-
 hw/phb3.c           |  1 +
 include/capp.h      | 29 -----------------------------
 include/phb3-capp.h | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++
 4 files changed, 52 insertions(+), 30 deletions(-)
 create mode 100644 include/phb3-capp.h

On 10/02/17 20:04, Christophe Lombard wrote:
> The definitions of the CAPP registers for PHB3 are moved in a specific
> file.
> The updated file capp.h will be used for the common functionalities
> about the CAPP for PHB3 and PHB4.
>
> Signed-off-by: Christophe Lombard <clombard@linux.vnet.ibm.com>

LGTM

Reviewed-by: Andrew Donnellan <andrew.donnellan@au1.ibm.com>


> ---
>  core/hmi.c          |  2 +-
>  hw/phb3.c           |  1 +
>  include/capp.h      | 29 -----------------------------
>  include/phb3-capp.h | 50 ++++++++++++++++++++++++++++++++++++++++++++++++++
>  4 files changed, 52 insertions(+), 30 deletions(-)
>  create mode 100644 include/phb3-capp.h
>
> diff --git a/core/hmi.c b/core/hmi.c
> index 6fe060d..eb43807 100644
> --- a/core/hmi.c
> +++ b/core/hmi.c
> @@ -19,7 +19,7 @@
>  #include <processor.h>
>  #include <chiptod.h>
>  #include <xscom.h>
> -#include <capp.h>
> +#include <phb3-capp.h>
>  #include <pci.h>
>  #include <cpu.h>
>  #include <chip.h>
> diff --git a/hw/phb3.c b/hw/phb3.c
> index 4010739..f0e957c 100644
> --- a/hw/phb3.c
> +++ b/hw/phb3.c
> @@ -30,6 +30,7 @@
>  #include <affinity.h>
>  #include <phb3.h>
>  #include <phb3-regs.h>
> +#include <phb3-capp.h>
>  #include <capp.h>
>  #include <fsp.h>
>  #include <chip.h>
> diff --git a/include/capp.h b/include/capp.h
> index c76258b..d0c28c9 100644
> --- a/include/capp.h
> +++ b/include/capp.h
> @@ -62,33 +62,4 @@ enum capp_reg {
>  	apc_master_powerbus_ctrl	= 0xB
>  };
>
> -#define CAPP_SNP_ARRAY_ADDR_REG			0x2013028
> -#define CAPP_APC_MASTER_ARRAY_ADDR_REG		0x201302A
> -#define CAPP_SNP_ARRAY_WRITE_REG		0x2013801
> -#define CAPP_APC_MASTER_ARRAY_WRITE_REG		0x2013802
> -
> -#define CAPP_FIR                                0x2013000
> -#define CAPP_ERR_RPT_CLR                        0x2013013
> -#define APC_MASTER_PB_CTRL			0x2013018
> -#define APC_MASTER_CAPI_CTRL			0x2013019
> -#define TRANSPORT_CONTROL			0x201301C
> -#define CANNED_PRESP_MAP0			0x201301D
> -#define CANNED_PRESP_MAP1			0x201301E
> -#define CANNED_PRESP_MAP2			0x201301F
> -#define CAPP_ERR_STATUS_CTRL			0x201300E
> -#define FLUSH_SUE_STATE_MAP			0x201300F
> -#define CAPP_TB					0x2013026
> -#define CAPP_TFMR				0x2013027
> -#define CAPP_EPOCH_TIMER_CTRL			0x201302C
> -#define FLUSH_UOP_CONFIG1			0x2013803
> -#define FLUSH_UOP_CONFIG2			0x2013804
> -#define SNOOP_CAPI_CONFIG			0x201301A
> -
> -/*
> - * Naples has two CAPP units, statically mapped:
> - * CAPP0 attached to PHB0, and CAPP1 attached to PHB1.
> - * The addresses of CAPP1 XSCOMS registers are 0x180 away.
> - */
> -#define CAPP1_REG_OFFSET 0x180
> -
>  #endif /* __CAPP_H */
> diff --git a/include/phb3-capp.h b/include/phb3-capp.h
> new file mode 100644
> index 0000000..3834ef4
> --- /dev/null
> +++ b/include/phb3-capp.h
> @@ -0,0 +1,50 @@
> +/* Copyright 2013-2017 IBM Corp.
> + *
> + * Licensed under the Apache License, Version 2.0 (the "License");
> + * you may not use this file except in compliance with the License.
> + * You may obtain a copy of the License at
> + *
> + * 	http://www.apache.org/licenses/LICENSE-2.0
> + *
> + * Unless required by applicable law or agreed to in writing, software
> + * distributed under the License is distributed on an "AS IS" BASIS,
> + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or
> + * implied.
> + * See the License for the specific language governing permissions and
> + * limitations under the License.
> + */
> +
> +#ifndef __PHB3_CAPP_H
> +#define __PHB3_CAPP_H
> +
> +
> +#define CAPP_SNP_ARRAY_ADDR_REG 		0x2013028
> +#define CAPP_APC_MASTER_ARRAY_ADDR_REG		0x201302A
> +#define CAPP_SNP_ARRAY_WRITE_REG		0x2013801
> +#define CAPP_APC_MASTER_ARRAY_WRITE_REG 	0x2013802
> +
> +#define CAPP_FIR				0x2013000
> +#define CAPP_ERR_RPT_CLR			0x2013013
> +#define APC_MASTER_PB_CTRL			0x2013018
> +#define APC_MASTER_CAPI_CTRL			0x2013019
> +#define TRANSPORT_CONTROL			0x201301C
> +#define CANNED_PRESP_MAP0			0x201301D
> +#define CANNED_PRESP_MAP1			0x201301E
> +#define CANNED_PRESP_MAP2			0x201301F
> +#define CAPP_ERR_STATUS_CTRL			0x201300E
> +#define FLUSH_SUE_STATE_MAP			0x201300F
> +#define CAPP_TB 				0x2013026
> +#define CAPP_TFMR				0x2013027
> +#define CAPP_EPOCH_TIMER_CTRL			0x201302C
> +#define FLUSH_UOP_CONFIG1			0x2013803
> +#define FLUSH_UOP_CONFIG2			0x2013804
> +#define SNOOP_CAPI_CONFIG			0x201301A
> +
> +/*
> + * Naples has two CAPP units, statically mapped:
> + * CAPP0 attached to PHB0, and CAPP1 attached to PHB1.
> + * The addresses of CAPP1 XSCOMS registers are 0x180 away.
> + */
> +#define CAPP1_REG_OFFSET 0x180
> +
> +#endif /* __PHB3_CAPP_H */
>