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Violators will be prosecuted; Thu, 2 Jun 2016 04:51:29 -0400 X-IBM-Helo: d01dlp03.pok.ibm.com X-IBM-MailFrom: shreyas@linux.vnet.ibm.com X-IBM-RcptTo: skiboot@lists.ozlabs.org;mikey@neuling.org Received: from b01cxnp22035.gho.pok.ibm.com (b01cxnp22035.gho.pok.ibm.com [9.57.198.25]) by d01dlp03.pok.ibm.com (Postfix) with ESMTP id 76230C9003E; Thu, 2 Jun 2016 04:51:21 -0400 (EDT) Received: from b01ledav03.gho.pok.ibm.com (b01ledav003.gho.pok.ibm.com [9.57.199.108]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id u528pTKJ38862988; Thu, 2 Jun 2016 08:51:29 GMT Received: from b01ledav03.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id F1F5EB2051; Thu, 2 Jun 2016 04:51:28 -0400 (EDT) Received: from adminib-ovr2cdm.in.ibm.com (unknown [9.79.180.251]) by b01ledav03.gho.pok.ibm.com (Postfix) with ESMTP id 28A2DB204E; Thu, 2 Jun 2016 04:51:26 -0400 (EDT) From: "Shreyas B. Prabhu" To: stewart@linux.vnet.ibm.com Date: Thu, 2 Jun 2016 14:20:47 +0530 Message-Id: <1464857449-12627-5-git-send-email-shreyas@linux.vnet.ibm.com> X-Mailer: git-send-email 1.9.3 In-Reply-To: <1464857449-12627-1-git-send-email-shreyas@linux.vnet.ibm.com> References: <1464857449-12627-1-git-send-email-shreyas@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 X-Content-Scanned: Fidelis XPS MAILER x-cbid: 16060208-0057-0000-0000-0000047DA56B X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused Subject: [Skiboot] [PATCH v3 4/6] doc/device-tree: Add documentation for ibm, cpu-idle-state-* properties X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: skiboot@lists.ozlabs.org, mikey@neuling.org MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" Add documentation for following nodes- ibm,cpu-idle-state-pmicr ibm,cpu-idle-state-pmicr-mask ibm,cpu-idle-state-psscr ibm,cpu-idle-state-psscr-mask ibm,cpu-idle-state-flags Also removing ibm,cpu-idle-state-names from FIXME since its already documented. Signed-off-by: Shreyas B. Prabhu Acked-by: Michael Neuling --- doc/device-tree/ibm,opal/power-mgt.txt | 32 +++++++++++++++++++++++++++----- 1 file changed, 27 insertions(+), 5 deletions(-) diff --git a/doc/device-tree/ibm,opal/power-mgt.txt b/doc/device-tree/ibm,opal/power-mgt.txt index d9cadb87fdea..ca3487d492d8 100644 --- a/doc/device-tree/ibm,opal/power-mgt.txt +++ b/doc/device-tree/ibm,opal/power-mgt.txt @@ -26,6 +26,33 @@ ibm,cpu-idle-state-residency-ns = <0x1 0x2 0x3> ibm,cpu-idle-state-latencies-ns = <0x1 0x2 0x3> +ibm,cpu-idle-state-pmicr ibm,cpu-idle-state-pmicr-mask +------------------------------------------------------ +In POWER8, idle states sleep and winkle have 2 modes- fast and deep. In fast +mode, idle state puts the core into threshold voltage whereas deep mode +completely turns off the core. Choosing fast vs deep mode for an idle state +can be done either via PM_GP1 scom or by writing to PMICR special register. +If using the PMICR path to choose fast/deep mode then ibm,cpu-idle-state-pmicr +and ibm,cpu-idle-state-pmicr-mask properties expose relevant PMICR bits and +values for corresponding idle states. + + +ibm,cpu-idle-state-psscr ibm,cpu-idle-state-psscr-mask +------------------------------------------------------ +In POWER ISA v3, there is a common instruction 'stop' to enter any idle state +and SPR PSSCR is used to specify which idle state needs to be entered upon +executing stop instruction. Properties ibm,cpu-idle-state-psscr and +ibm,cpu-idle-state-psscr-mask expose the relevant PSSCR bits and values for +corresponding idle states. + + +ibm,cpu-idle-state-flags +------------------------ +These flags are used to describe the characteristics of the idle states like +the kind of core state loss caused. These flags are used by the kernel to +save/restore appropriate context while using the idle states. + + ibm,pstate-ids -------------- @@ -67,8 +94,3 @@ ibm,pstate-core-max This property is added when ultra_turbo(WOF) is enabled. This property gives the list of max pstate for each 'n' number of active cores in the chip. -FIXME: document these: -ibm,cpu-idle-state-flags -ibm,cpu-idle-state-names -ibm,cpu-idle-state-pmicr -ibm,cpu-idle-state-pmicr-mask