From patchwork Mon Jun 29 00:44:22 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gavin Shan X-Patchwork-Id: 489192 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.ozlabs.org (lists.ozlabs.org [103.22.144.68]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id CBC9A14076D for ; Mon, 29 Jun 2015 10:45:37 +1000 (AEST) Received: from ozlabs.org (lists.ozlabs.org [IPv6:2401:3900:2:1::3]) by lists.ozlabs.org (Postfix) with ESMTP id 9FEF41A0FF5 for ; Mon, 29 Jun 2015 10:45:37 +1000 (AEST) X-Original-To: skiboot@lists.ozlabs.org Delivered-To: skiboot@lists.ozlabs.org Received: from e23smtp09.au.ibm.com (e23smtp09.au.ibm.com [202.81.31.142]) (using TLSv1 with cipher CAMELLIA256-SHA (256/256 bits)) (No client certificate requested) by lists.ozlabs.org (Postfix) with ESMTPS id DF46A1A02D8 for ; Mon, 29 Jun 2015 10:45:25 +1000 (AEST) Received: from /spool/local by e23smtp09.au.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Mon, 29 Jun 2015 10:45:25 +1000 Received: from d23dlp02.au.ibm.com (202.81.31.213) by e23smtp09.au.ibm.com (202.81.31.206) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Mon, 29 Jun 2015 10:45:22 +1000 X-Helo: d23dlp02.au.ibm.com X-MailFrom: gwshan@linux.vnet.ibm.com X-RcptTo: skiboot@lists.ozlabs.org Received: from d23relay08.au.ibm.com (d23relay08.au.ibm.com [9.185.71.33]) by d23dlp02.au.ibm.com (Postfix) with ESMTP id 478B52BB003F for ; Mon, 29 Jun 2015 10:45:22 +1000 (EST) Received: from d23av03.au.ibm.com (d23av03.au.ibm.com [9.190.234.97]) by d23relay08.au.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id t5T0jBYL54984726 for ; Mon, 29 Jun 2015 10:45:19 +1000 Received: from d23av03.au.ibm.com (localhost [127.0.0.1]) by d23av03.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVout) with ESMTP id t5T0inqc019792 for ; Mon, 29 Jun 2015 10:44:49 +1000 Received: from ozlabs.au.ibm.com (ozlabs.au.ibm.com [9.192.253.14]) by d23av03.au.ibm.com (8.14.4/8.14.4/NCO v10.0 AVin) with ESMTP id t5T0imD0019440; Mon, 29 Jun 2015 10:44:49 +1000 Received: from bran.ozlabs.ibm.com (unknown [9.192.254.114]) by ozlabs.au.ibm.com (Postfix) with ESMTP id 7A3AEA0375; Mon, 29 Jun 2015 10:44:24 +1000 (AEST) Received: from gwshan (shangw.ozlabs.ibm.com [10.61.2.199]) by bran.ozlabs.ibm.com (Postfix) with ESMTP id 70429E38CF; Mon, 29 Jun 2015 10:44:24 +1000 (AEST) Received: by gwshan (Postfix, from userid 1000) id 6CCEB941903; Mon, 29 Jun 2015 10:44:24 +1000 (AEST) From: Gavin Shan To: skiboot@lists.ozlabs.org Date: Mon, 29 Jun 2015 10:44:22 +1000 Message-Id: <1435538662-8675-3-git-send-email-gwshan@linux.vnet.ibm.com> X-Mailer: git-send-email 2.1.0 In-Reply-To: <1435538662-8675-1-git-send-email-gwshan@linux.vnet.ibm.com> References: <1435538662-8675-1-git-send-email-gwshan@linux.vnet.ibm.com> X-TM-AS-MML: disable X-Content-Scanned: Fidelis XPS MAILER x-cbid: 15062900-0033-0000-0000-000001B1DB0F Subject: [Skiboot] [PATCH 2/2] hw/phb3: Fix M64 error injection for VFs X-BeenThere: skiboot@lists.ozlabs.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: Mailing list for skiboot development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: skiboot-bounces+incoming=patchwork.ozlabs.org@lists.ozlabs.org Sender: "Skiboot" The last M64 (64-bits MMIO) BAR is always enabled and it is equal to the PHB's M64 window. Also, the BAR is split to 256 segments and each PE will have one segment in it. However, the VF PE takes another BAR other than the last one to accomodate its M64 resources. So current code will always give wrong M64 base address and size when injecting M64 error for specified VF PE. In order to fix the issue, we have to recognize the type of the target PE: (A) bus dependent or (B) PCI device (VF) dependent. For (A), we figure out the M64 base address and length from the last M64 BAR. For (B), we scan from BAR#0 to BAR#14 and first hit wins. Signed-off-by: Gavin Shan --- hw/phb3.c | 33 ++++++++++++++++++++++----------- 1 file changed, 22 insertions(+), 11 deletions(-) diff --git a/hw/phb3.c b/hw/phb3.c index 9d52c84..47261c3 100644 --- a/hw/phb3.c +++ b/hw/phb3.c @@ -2818,10 +2818,27 @@ static int64_t phb3_err_inject_mem64(struct phb3 *p, uint32_t pe_no, uint64_t base, len, segstart, segsize; uint64_t cache, a, m; uint64_t ctrl = PHB_PAPR_ERR_INJ_CTL_OUTB; - uint32_t index; + uint32_t index, s_index, e_index; + + /* By default, the PE is PCI device dependent one */ + s_index = 0; + e_index = ARRAY_SIZE(p->m64b_cache) - 2; + for (index = 0; index < RTT_TABLE_ENTRIES; index++) { + if (p->rte_cache[index] != pe_no) + continue; + + if (index + 8 >= RTT_TABLE_ENTRIES) + break; + + /* PCI bus dependent PE */ + if (p->rte_cache[index + 8] == pe_no) { + s_index = e_index = ARRAY_SIZE(p->m64b_cache) - 1; + break; + } + } a = base = len = 0x0ull; - for (index = 0; index < ARRAY_SIZE(p->m64b_cache); index++) { + for (index = s_index; !len && index <= e_index; index++) { cache = p->m64b_cache[index]; if (!(cache & IODA2_M64BT_ENABLE)) continue; @@ -2845,24 +2862,18 @@ static int64_t phb3_err_inject_mem64(struct phb3 *p, uint32_t pe_no, segstart = segstart + segsize * pe_no; } - /* We expect contiguous segments. Otherwise, to - * pick the bigger one, which has more possibility - * to be accessed + /* First window always wins based on the ascending + * searching priority the 16 BARs have. We're using + * the feature to assign resource for SRIOV VFs. */ if (!len) { base = segstart; len = segsize; - } else if ((base + len) == segstart) { - len += segsize; - } else if (segsize > len) { - base = segstart; - len = segsize; } /* Specified address is valid one */ if (addr >= segstart && addr < (segstart + segsize)) { a = addr; - break; } }