@@ -98,9 +98,10 @@ static int64_t p5ioc2_pcicfg_address(struct p5ioc2_phb *p, uint32_t bdfn,
* bus number register ?
*/
- addr = CAP_PCADR_ENABLE | ((uint64_t)bdfn << CAP_PCADR_FUNC_LSH);
+ addr = CAP_PCADR_ENABLE;
+ addr = SETFIELD(CAP_PCADR_BDFN, addr, bdfn);
+ addr = SETFIELD(CAP_PCADR_EXTOFF, addr, offset >> 8);
addr |= (offset & 0xff);
- addr |= ((offset & 0xf00) << (CAP_PCADR_EXTOFF_LSH - 8));
out_le32(p->regs + CAP_PCADR, addr);
return OPAL_SUCCESS;
@@ -138,7 +138,8 @@ static int64_t p7ioc_pcicfg_read##size(struct phb *phb, uint32_t bdfn, \
return OPAL_HARDWARE; \
} \
\
- addr = PHB_CA_ENABLE | ((uint64_t)bdfn << PHB_CA_FUNC_LSH); \
+ addr = PHB_CA_ENABLE; \
+ addr = SETFIELD(PHB_CA_BDFN, addr, bdfn); \
addr = SETFIELD(PHB_CA_REG, addr, offset); \
out_be64(base + PHB_CONFIG_ADDRESS, addr); \
*data = in_le##size(base + PHB_CONFIG_DATA + \
@@ -169,7 +170,8 @@ static int64_t p7ioc_pcicfg_write##size(struct phb *phb, uint32_t bdfn, \
return OPAL_HARDWARE; \
} \
\
- addr = PHB_CA_ENABLE | ((uint64_t)bdfn << PHB_CA_FUNC_LSH); \
+ addr = PHB_CA_ENABLE; \
+ addr = SETFIELD(PHB_CA_BDFN, addr, bdfn); \
addr = SETFIELD(PHB_CA_REG, addr, offset); \
out_be64(base + PHB_CONFIG_ADDRESS, addr); \
out_le##size(base + PHB_CONFIG_DATA + \
@@ -173,7 +173,8 @@ static int64_t phb3_pcicfg_read##size(struct phb *phb, uint32_t bdfn, \
return OPAL_HARDWARE; \
} \
\
- addr = PHB_CA_ENABLE | ((uint64_t)bdfn << PHB_CA_FUNC_LSH); \
+ addr = PHB_CA_ENABLE; \
+ addr = SETFIELD(PHB_CA_BDFN, addr, bdfn); \
addr = SETFIELD(PHB_CA_REG, addr, offset); \
addr = SETFIELD(PHB_CA_PE, addr, pe); \
if (use_asb) { \
@@ -212,7 +213,8 @@ static int64_t phb3_pcicfg_write##size(struct phb *phb, uint32_t bdfn, \
return OPAL_HARDWARE; \
} \
\
- addr = PHB_CA_ENABLE | ((uint64_t)bdfn << PHB_CA_FUNC_LSH); \
+ addr = PHB_CA_ENABLE; \
+ addr = SETFIELD(PHB_CA_BDFN, addr, bdfn); \
addr = SETFIELD(PHB_CA_REG, addr, offset); \
addr = SETFIELD(PHB_CA_PE, addr, pe); \
if (use_asb) { \
@@ -135,6 +135,7 @@
#define CAP_PCADR 0x140
#define CAP_PCADR_ENABLE PPC_BIT32(0)
#define CAP_PCADR_FUNC PPC_BITMASK32(21,23)
+#define CAP_PCADR_BDFN PPC_BITMASK32(8,23) /* bus,dev,func */
#define CAP_PCADR_EXTOFF PPC_BITMASK32(4,7)
#define CAP_PCDAT 0x130
#define CAP_PCFGRW 0x160
@@ -125,6 +125,7 @@
#define PHB_CA_BUS PPC_BITMASK(4,11)
#define PHB_CA_DEV PPC_BITMASK(12,16)
#define PHB_CA_FUNC PPC_BITMASK(17,19)
+#define PHB_CA_BDFN PPC_BITMASK(4,19) /* bus,dev,func */
#define PHB_CA_REG PPC_BITMASK(20,31)
#define PHB_LOCK1 0x148
#define PHB_PHB2_CONFIG 0x160
@@ -43,6 +43,7 @@
#define PHB_CA_BUS PPC_BITMASK(4,11)
#define PHB_CA_DEV PPC_BITMASK(12,16)
#define PHB_CA_FUNC PPC_BITMASK(17,19)
+#define PHB_CA_BDFN PPC_BITMASK(4,19) /* bus,dev,func */
#define PHB_CA_REG PPC_BITMASK(20,31)
#define PHB_CA_PE PPC_BITMASK(40,47)
#define PHB_LOCK1 0x148
In several places, a "bus/device/function" u16 was being directly or'ed into an address using a left-shift. This should be using SETFIELD, especially now that all _LSH have been removed. Change use of BDFN (bus/device/function) field from using plain left-shift to using SETFIELD(). Add proper BDFN field definitions. Signed-off-by: Dan Streetman <ddstreet@ieee.org> --- hw/p5ioc2-phb.c | 5 +++-- hw/p7ioc-phb.c | 6 ++++-- hw/phb3.c | 6 ++++-- include/p5ioc2-regs.h | 1 + include/p7ioc-regs.h | 1 + include/phb3-regs.h | 1 + 6 files changed, 14 insertions(+), 6 deletions(-)