diff mbox series

[v2] platform/mihawk: Tune equalization settings for opencapi

Message ID 20200423175443.213832-1-fbarrat@linux.ibm.com
State New
Headers show
Series [v2] platform/mihawk: Tune equalization settings for opencapi | expand

Commit Message

Frederic Barrat April 23, 2020, 5:54 p.m. UTC
The Bittware 250SOC adapter on Mihawk was showing a high count of CRC
errors on one of the opencapi slots. The PHY team suggested new
equalization settings to correct the errors.

All existing adapters have been tested on mihawk to make sure the
settings are compatible. However, the new settings should not be used
on platforms other than mihawk.

The changes specific to mihawk are:
- Update the tx_ffe_pre_coeff and tx_ffe_post_coeff input parameters
  used during zcal
- turn off the tx_ffe_boost parameter through scom

Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
Cc: skiboot-stable@lists.ozlabs.org # skiboot-op940.x
---

Vasant, Oliver: this is for mihawk and should not have any side effect
on other plaforms. At this point, I'm thoroughly confused whether it
should go to the skiboot-op940.x branch, as I'm hearing conflicting
signals. In any case, it should go to master for our own good and be
able to use our lab systems. Time will sort out the skiboot-op940.x
status.



Changelog:
v2: avoid globals (Andrew)



 hw/npu2-hw-procedures.c   | 23 +++++++++++++++++++----
 include/platform.h        |  7 +++++++
 platforms/astbmc/mihawk.c |  7 +++++++
 3 files changed, 33 insertions(+), 4 deletions(-)

Comments

Andrew Donnellan May 11, 2020, 9:18 a.m. UTC | #1
On 24/4/20 3:54 am, Frederic Barrat wrote:
> The Bittware 250SOC adapter on Mihawk was showing a high count of CRC
> errors on one of the opencapi slots. The PHY team suggested new
> equalization settings to correct the errors.
> 
> All existing adapters have been tested on mihawk to make sure the
> settings are compatible. However, the new settings should not be used
> on platforms other than mihawk.
> 
> The changes specific to mihawk are:
> - Update the tx_ffe_pre_coeff and tx_ffe_post_coeff input parameters
>    used during zcal
> - turn off the tx_ffe_boost parameter through scom
> 
> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
> Cc: skiboot-stable@lists.ozlabs.org # skiboot-op940.x
> ---
> 
> Vasant, Oliver: this is for mihawk and should not have any side effect
> on other plaforms. At this point, I'm thoroughly confused whether it
> should go to the skiboot-op940.x branch, as I'm hearing conflicting
> signals. In any case, it should go to master for our own good and be
> able to use our lab systems. Time will sort out the skiboot-op940.x
> status.
> 
> 
> 
> Changelog:
> v2: avoid globals (Andrew)
> 

Thanks.

Reviewed-by: Andrew Donnellan <ajd@linux.ibm.com>
Oliver O'Halloran May 26, 2020, 7:03 a.m. UTC | #2
On Fri, Apr 24, 2020 at 3:55 AM Frederic Barrat <fbarrat@linux.ibm.com> wrote:
>
> The Bittware 250SOC adapter on Mihawk was showing a high count of CRC
> errors on one of the opencapi slots. The PHY team suggested new
> equalization settings to correct the errors.
>
> All existing adapters have been tested on mihawk to make sure the
> settings are compatible. However, the new settings should not be used
> on platforms other than mihawk.
>
> The changes specific to mihawk are:
> - Update the tx_ffe_pre_coeff and tx_ffe_post_coeff input parameters
>   used during zcal
> - turn off the tx_ffe_boost parameter through scom
>
> Signed-off-by: Frederic Barrat <fbarrat@linux.ibm.com>
> Cc: skiboot-stable@lists.ozlabs.org # skiboot-op940.x

Thanks, merged as afe6bc9051907d25082309895f8cfe44f59e2f25
diff mbox series

Patch

diff --git a/hw/npu2-hw-procedures.c b/hw/npu2-hw-procedures.c
index 6236380a..fb88dfdf 100644
--- a/hw/npu2-hw-procedures.c
+++ b/hw/npu2-hw-procedures.c
@@ -78,6 +78,7 @@  static struct npu2_phy_reg NPU2_PHY_TX_ZCAL_DONE	       = {0x3c1, 50, 1};
 static struct npu2_phy_reg NPU2_PHY_TX_ZCAL_ERROR	       = {0x3c1, 51, 1};
 static struct npu2_phy_reg NPU2_PHY_TX_ZCAL_N		       = {0x3c3, 48, 9};
 static struct npu2_phy_reg NPU2_PHY_TX_ZCAL_P		       = {0x3c5, 48, 9};
+static struct npu2_phy_reg NPU2_PHY_TX_FFE_BOOST_EN	       = {0x34b, 59, 1};
 static struct npu2_phy_reg NPU2_PHY_TX_PSEG_PRE_EN	       = {0x34d, 51, 5};
 static struct npu2_phy_reg NPU2_PHY_TX_PSEG_PRE_SELECT	       = {0x34d, 56, 5};
 static struct npu2_phy_reg NPU2_PHY_TX_NSEG_PRE_EN	       = {0x34f, 51, 5};
@@ -533,6 +534,8 @@  static uint32_t therm_with_half(uint32_t dec, uint8_t width)
 static uint32_t phy_tx_zcal_calculate(struct npu2_dev *ndev)
 {
 	int p_value, n_value;
+	int ffe_pre_coeff = FFE_PRE_COEFF;
+	int ffe_post_coeff = FFE_POST_COEFF;
 	uint32_t zcal_n;
 	uint32_t zcal_p;
 	uint32_t p_main_enable = MAIN_X2_MAX;
@@ -564,9 +567,15 @@  static uint32_t phy_tx_zcal_calculate(struct npu2_dev *ndev)
 	    (zcal_p < ZCAL_MIN) || (zcal_p > ZCAL_MAX))
 		return PROCEDURE_COMPLETE | PROCEDURE_FAILED;
 
+	if (ndev->type == NPU2_DEV_TYPE_OPENCAPI &&
+	    platform.ocapi->phy_setup) {
+		ffe_pre_coeff = platform.ocapi->phy_setup->tx_ffe_pre_coeff;
+		ffe_post_coeff = platform.ocapi->phy_setup->tx_ffe_post_coeff;
+	}
+
 	p_value = zcal_p - TOTAL_X2_MAX;
-	p_precursor_select = (p_value * FFE_PRE_COEFF)/128;
-	p_postcursor_select = (p_value * FFE_POST_COEFF)/128;
+	p_precursor_select = (p_value * ffe_pre_coeff)/128;
+	p_postcursor_select = (p_value * ffe_post_coeff)/128;
 	margin_pu_select = (p_value * MARGIN_RATIO)/256;
 
 	if (p_value % 2) {
@@ -587,8 +596,8 @@  static uint32_t phy_tx_zcal_calculate(struct npu2_dev *ndev)
 	}
 
 	n_value = zcal_n - TOTAL_X2_MAX;
-	n_precursor_select = (n_value * FFE_PRE_COEFF)/128;
-	n_postcursor_select = (n_value * FFE_POST_COEFF)/128;
+	n_precursor_select = (n_value * ffe_pre_coeff)/128;
+	n_postcursor_select = (n_value * ffe_post_coeff)/128;
 	margin_pd_select = (p_value * MARGIN_RATIO)/256;
 
 	if (n_value % 2) {
@@ -1020,6 +1029,12 @@  void npu2_opencapi_bump_ui_lane(struct npu2_dev *dev)
 
 void npu2_opencapi_phy_init(struct npu2_dev *dev)
 {
+	if (platform.ocapi->phy_setup) {
+		OCAPIINF(dev, "Enabling platform-specific PHY setup\n");
+		phy_write(dev, &NPU2_PHY_TX_FFE_BOOST_EN,
+			  platform.ocapi->phy_setup->tx_ffe_boost_en);
+	}
+
 	run_procedure(dev, 5); /* procedure_phy_tx_zcal */
 	/*
 	 * This is only required for OpenCAPI - Hostboot tries to set this
diff --git a/include/platform.h b/include/platform.h
index 6aa263ae..ef93278b 100644
--- a/include/platform.h
+++ b/include/platform.h
@@ -47,6 +47,12 @@  struct bmc_platform {
 	const struct bmc_sw_config *sw;
 };
 
+struct ocapi_phy_setup {
+	int tx_ffe_pre_coeff;
+	int tx_ffe_post_coeff;
+	int tx_ffe_boost_en;
+};
+
 /* OpenCAPI platform-specific I2C information */
 struct platform_ocapi {
 	uint8_t i2c_engine;		/* I2C engine number */
@@ -64,6 +70,7 @@  struct platform_ocapi {
 	bool odl_phy_swap;		/* Swap ODL1 to use brick 2 rather than
 					 * brick 1 lanes */
 	const char *(*ocapi_slot_label)(uint32_t chip_id, uint32_t brick_index);
+	const struct ocapi_phy_setup *phy_setup;
 };
 
 struct dt_node;
diff --git a/platforms/astbmc/mihawk.c b/platforms/astbmc/mihawk.c
index 8971b407..f3669ff3 100644
--- a/platforms/astbmc/mihawk.c
+++ b/platforms/astbmc/mihawk.c
@@ -142,6 +142,12 @@  static const char *mihawk_ocapi_slot_label(uint32_t chip_id,
 	return name;
 }
 
+static const struct ocapi_phy_setup mihawk_phy = {
+	.tx_ffe_pre_coeff = 0x3,
+	.tx_ffe_post_coeff = 0x14,
+	.tx_ffe_boost_en = 0,
+};
+
 static const struct platform_ocapi mihawk_ocapi = {
         .i2c_engine          = 1,
         .i2c_port            = 4,
@@ -157,6 +163,7 @@  static const struct platform_ocapi mihawk_ocapi = {
         .i2c_presence_brick5 = 0, /* unused */
         .odl_phy_swap        = true,
 	.ocapi_slot_label    = mihawk_ocapi_slot_label,
+	.phy_setup           = &mihawk_phy,
 };
 
 static const struct slot_table_entry P1E1A_x8_PLX8748_RiserA_down[] = {