| Message ID | 20240614071932.1014067-4-claudiu.beznea.uj@bp.renesas.com |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | Add RTC support for the Renesas RZ/G3S SoC | expand |
On Fri, Jun 14, 2024 at 10:19:23AM +0300, Claudiu wrote: > +patternProperties: > + "^clock-controller@[0-9a-f]+$": > + $ref: /schemas/clock/renesas,rzg3s-vbattb-clk.yaml# > + description: VBATTCLK clock Being a bit of a pedant here, but isn't the address known? You leaving room for future devices with it at a different offset?
On 14/06/2024 09:19, Claudiu wrote: > From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > + > +maintainers: > + - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > + > +properties: > + compatible: > + items: > + - const: renesas,rzg3s-vbattb > + - const: syscon > + - const: simple-mfd No, mfd does no look good. That's not a simple device anymore and you claim here child does not need vbat bclk, power domains and resets? That would be a big surprise, although technically possible. Please clarify: which of parent resources are needed for children? ... > + > +additionalProperties: false > + > +examples: > + - | > + #include <dt-bindings/clock/r9a08g045-cpg.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + > + vbattb: vbattb@1005c000 { > + compatible = "renesas,rzg3s-vbattb", "syscon", "simple-mfd"; > + reg = <0x1005c000 0x1000>; > + ranges = <0 0 0x1005c000 0 0x1000>; > + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "tampdi"; > + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>; > + clock-names = "bclk"; > + power-domains = <&cpg>; > + resets = <&cpg R9A08G045_VBAT_BRESETN>; > + #address-cells = <2>; > + #size-cells = <2>; > + status = "disabled"; Drop > + > + vbattclk: clock-controller@1c { > + compatible = "renesas,rzg3s-vbattb-clk"; > + reg = <0 0x1c 0 0x10>; > + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattb_xtal>; > + clock-names = "bclk", "vbattb_xtal"; > + #clock-cells = <0>; > + power-domains = <&cpg>; > + status = "disabled"; Drop > + }; > + }; > + > +... Best regards, Krzysztof
On 15.06.2024 15:19, Conor Dooley wrote: > On Fri, Jun 14, 2024 at 10:19:23AM +0300, Claudiu wrote: >> +patternProperties: >> + "^clock-controller@[0-9a-f]+$": >> + $ref: /schemas/clock/renesas,rzg3s-vbattb-clk.yaml# >> + description: VBATTCLK clock > > Being a bit of a pedant here, but isn't the address known? It is. > You leaving > room for future devices with it at a different offset? Ok, I'll keep it 1c instead. Thank you for your review, Claudiu Beznea
On 16.06.2024 10:38, Krzysztof Kozlowski wrote: > On 14/06/2024 09:19, Claudiu wrote: >> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> > >> + >> +maintainers: >> + - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> >> + >> +properties: >> + compatible: >> + items: >> + - const: renesas,rzg3s-vbattb >> + - const: syscon >> + - const: simple-mfd > > No, mfd does no look good. That's not a simple device anymore and you > claim here child does not need vbat bclk, power domains and resets? That > would be a big surprise, although technically possible. I wasn't sure how this MFD will be received by the Renesas maintainers so I kept it simple for this version. In theory the VBAT clk, power domain and resets are specific to VBAT module itself but, indeed, the child cannot work w/o these. > > Please clarify: which of parent resources are needed for children? VBAT clock, power domain are needed. Reset, too. In the current implementation the reset is deasserted though parent by calling the syscon_node_to_regmap(np->parent) in the clock driver. > > ... > >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + #include <dt-bindings/clock/r9a08g045-cpg.h> >> + #include <dt-bindings/interrupt-controller/arm-gic.h> >> + >> + vbattb: vbattb@1005c000 { >> + compatible = "renesas,rzg3s-vbattb", "syscon", "simple-mfd"; >> + reg = <0x1005c000 0x1000>; >> + ranges = <0 0 0x1005c000 0 0x1000>; >> + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; >> + interrupt-names = "tampdi"; >> + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>; >> + clock-names = "bclk"; >> + power-domains = <&cpg>; >> + resets = <&cpg R9A08G045_VBAT_BRESETN>; >> + #address-cells = <2>; >> + #size-cells = <2>; >> + status = "disabled"; > > Drop Could you please clarify this? Would you want me to drop the full node (same for clock-controller node)? Can you point me an example that you are thinking about? Thank you, Claudiu Beznea > >> + >> + vbattclk: clock-controller@1c { >> + compatible = "renesas,rzg3s-vbattb-clk"; >> + reg = <0 0x1c 0 0x10>; >> + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattb_xtal>; >> + clock-names = "bclk", "vbattb_xtal"; >> + #clock-cells = <0>; >> + power-domains = <&cpg>; >> + status = "disabled"; > > Drop > >> + }; >> + }; >> + >> +... > > Best regards, > Krzysztof >
On 17.06.2024 10:16, claudiu beznea wrote: > > > On 16.06.2024 10:38, Krzysztof Kozlowski wrote: >> On 14/06/2024 09:19, Claudiu wrote: >>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> >> >>> + >>> +maintainers: >>> + - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> >>> + >>> +properties: >>> + compatible: >>> + items: >>> + - const: renesas,rzg3s-vbattb >>> + - const: syscon >>> + - const: simple-mfd >> >> No, mfd does no look good. That's not a simple device anymore and you >> claim here child does not need vbat bclk, power domains and resets? That >> would be a big surprise, although technically possible. > > I wasn't sure how this MFD will be received by the Renesas maintainers so I > kept it simple for this version. > > In theory the VBAT clk, power domain and resets are specific to VBAT module > itself but, indeed, the child cannot work w/o these. > >> >> Please clarify: which of parent resources are needed for children? > > VBAT clock, power domain are needed. Reset, too. In the current > implementation the reset is deasserted though parent by calling the > syscon_node_to_regmap(np->parent) in the clock driver. > >> >> ... >> >>> + >>> +additionalProperties: false >>> + >>> +examples: >>> + - | >>> + #include <dt-bindings/clock/r9a08g045-cpg.h> >>> + #include <dt-bindings/interrupt-controller/arm-gic.h> >>> + >>> + vbattb: vbattb@1005c000 { >>> + compatible = "renesas,rzg3s-vbattb", "syscon", "simple-mfd"; >>> + reg = <0x1005c000 0x1000>; >>> + ranges = <0 0 0x1005c000 0 0x1000>; >>> + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; >>> + interrupt-names = "tampdi"; >>> + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>; >>> + clock-names = "bclk"; >>> + power-domains = <&cpg>; >>> + resets = <&cpg R9A08G045_VBAT_BRESETN>; >>> + #address-cells = <2>; >>> + #size-cells = <2>; >>> + status = "disabled"; >> >> Drop > > Could you please clarify this? Would you want me to drop the full node > (same for clock-controller node)? Looking at your review on patch 05/12 from this series I noticed you're taking about the status = "disabled" lines. I'll drop it as suggested. Thank you, Claudiu Beznea > > Can you point me an example that you are thinking about? > > Thank you, > Claudiu Beznea > >> >>> + >>> + vbattclk: clock-controller@1c { >>> + compatible = "renesas,rzg3s-vbattb-clk"; >>> + reg = <0 0x1c 0 0x10>; >>> + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattb_xtal>; >>> + clock-names = "bclk", "vbattb_xtal"; >>> + #clock-cells = <0>; >>> + power-domains = <&cpg>; >>> + status = "disabled"; >> >> Drop >> >>> + }; >>> + }; >>> + >>> +... >> >> Best regards, >> Krzysztof >>
On 17/06/2024 09:16, claudiu beznea wrote: > > > On 16.06.2024 10:38, Krzysztof Kozlowski wrote: >> On 14/06/2024 09:19, Claudiu wrote: >>> From: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> >> >>> + >>> +maintainers: >>> + - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> >>> + >>> +properties: >>> + compatible: >>> + items: >>> + - const: renesas,rzg3s-vbattb >>> + - const: syscon >>> + - const: simple-mfd >> >> No, mfd does no look good. That's not a simple device anymore and you >> claim here child does not need vbat bclk, power domains and resets? That >> would be a big surprise, although technically possible. > > I wasn't sure how this MFD will be received by the Renesas maintainers so I > kept it simple for this version. > > In theory the VBAT clk, power domain and resets are specific to VBAT module > itself but, indeed, the child cannot work w/o these. > >> >> Please clarify: which of parent resources are needed for children? > > VBAT clock, power domain are needed. Reset, too. In the current > implementation the reset is deasserted though parent by calling the > syscon_node_to_regmap(np->parent) in the clock driver. Then you must drop simple-mfd. It's not simple-mfd if children needs parent's resources. > >> >> ... >> >>> + >>> +additionalProperties: false >>> + >>> +examples: >>> + - | >>> + #include <dt-bindings/clock/r9a08g045-cpg.h> >>> + #include <dt-bindings/interrupt-controller/arm-gic.h> >>> + >>> + vbattb: vbattb@1005c000 { >>> + compatible = "renesas,rzg3s-vbattb", "syscon", "simple-mfd"; >>> + reg = <0x1005c000 0x1000>; >>> + ranges = <0 0 0x1005c000 0 0x1000>; >>> + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; >>> + interrupt-names = "tampdi"; >>> + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>; >>> + clock-names = "bclk"; >>> + power-domains = <&cpg>; >>> + resets = <&cpg R9A08G045_VBAT_BRESETN>; >>> + #address-cells = <2>; >>> + #size-cells = <2>; >>> + status = "disabled"; >> >> Drop > > Could you please clarify this? Would you want me to drop the full node > (same for clock-controller node)? > > Can you point me an example that you are thinking about? The exact line I commented under. There is never status in any example. Please open any other binding or example-schema. Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/mfd/renesas,rzg3s-vbattb.yaml b/Documentation/devicetree/bindings/mfd/renesas,rzg3s-vbattb.yaml new file mode 100644 index 000000000000..c0259e557dc5 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/renesas,rzg3s-vbattb.yaml @@ -0,0 +1,99 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/mfd/renesas,rzg3s-vbattb.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Renesas Battery Backup Function (VBATTB) + +description: + Renesas VBATTB is a module which controls the RTC clock (VBATTCLK), tamper + detection logic and a small general usage memory (128B). + +maintainers: + - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> + +properties: + compatible: + items: + - const: renesas,rzg3s-vbattb + - const: syscon + - const: simple-mfd + + reg: + maxItems: 1 + + ranges: true + + interrupts: + maxItems: 1 + + interrupt-names: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + + '#address-cells': + const: 2 + + '#size-cells': + const: 2 + +patternProperties: + "^clock-controller@[0-9a-f]+$": + $ref: /schemas/clock/renesas,rzg3s-vbattb-clk.yaml# + description: VBATTCLK clock + +required: + - compatible + - reg + - interrupts + - interrupt-names + - clocks + - clock-names + - power-domains + - resets + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/r9a08g045-cpg.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + + vbattb: vbattb@1005c000 { + compatible = "renesas,rzg3s-vbattb", "syscon", "simple-mfd"; + reg = <0x1005c000 0x1000>; + ranges = <0 0 0x1005c000 0 0x1000>; + interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "tampdi"; + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>; + clock-names = "bclk"; + power-domains = <&cpg>; + resets = <&cpg R9A08G045_VBAT_BRESETN>; + #address-cells = <2>; + #size-cells = <2>; + status = "disabled"; + + vbattclk: clock-controller@1c { + compatible = "renesas,rzg3s-vbattb-clk"; + reg = <0 0x1c 0 0x10>; + clocks = <&cpg CPG_MOD R9A08G045_VBAT_BCLK>, <&vbattb_xtal>; + clock-names = "bclk", "vbattb_xtal"; + #clock-cells = <0>; + power-domains = <&cpg>; + status = "disabled"; + }; + }; + +...