diff mbox series

[3/3] riscv: dts: sophgo: add rtc dt node for CV1800B

Message ID 20231121094642.2973795-4-qiujingbao.dlmu@gmail.com
State Superseded
Headers show
Series riscv: sophgo: add rtc support for CV1800B | expand

Commit Message

Jingbao Qiu Nov. 21, 2023, 9:46 a.m. UTC
Add the rtc device tree node to CV1800B SoC.

Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
---
 arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Krzysztof Kozlowski Nov. 21, 2023, 10 a.m. UTC | #1
On 21/11/2023 10:46, Jingbao Qiu wrote:
> Add the rtc device tree node to CV1800B SoC.
> 
> Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> ---
>  arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
> 
> diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> index df40e87ee063..89411c75b89a 100644
> --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> @@ -119,5 +119,13 @@ clint: timer@74000000 {
>  			reg = <0x74000000 0x10000>;
>  			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
>  		};
> +
> +		rtc: rtc-controller@05026000 {
> +			compatible = "sophgo,cv800b-rtc";
> +			reg = <0x05026000 0x1000>;
> +			interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
> +			interrupt-parent = <&plic>;
> +			clocks = <&osc>;
> +		};

It does not look like you tested the DTS against bindings. Please run
`make dtbs_check W=1` (see
Documentation/devicetree/bindings/writing-schema.rst or
https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
for instructions).

Best regards,
Krzysztof
Jingbao Qiu Nov. 28, 2023, 1:23 p.m. UTC | #2
On Tue, Nov 21, 2023 at 6:00 PM Krzysztof Kozlowski
<krzysztof.kozlowski@linaro.org> wrote:
>
> On 21/11/2023 10:46, Jingbao Qiu wrote:
> > Add the rtc device tree node to CV1800B SoC.
> >
> > Signed-off-by: Jingbao Qiu <qiujingbao.dlmu@gmail.com>
> > ---
> >  arch/riscv/boot/dts/sophgo/cv1800b.dtsi | 8 ++++++++
> >  1 file changed, 8 insertions(+)
> >
> > diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > index df40e87ee063..89411c75b89a 100644
> > --- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > +++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
> > @@ -119,5 +119,13 @@ clint: timer@74000000 {
> >                       reg = <0x74000000 0x10000>;
> >                       interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
> >               };
> > +
> > +             rtc: rtc-controller@05026000 {
> > +                     compatible = "sophgo,cv800b-rtc";
> > +                     reg = <0x05026000 0x1000>;
> > +                     interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
> > +                     interrupt-parent = <&plic>;
> > +                     clocks = <&osc>;
> > +             };
>
> It does not look like you tested the DTS against bindings. Please run
> `make dtbs_check W=1` (see
> Documentation/devicetree/bindings/writing-schema.rst or
> https://www.linaro.org/blog/tips-and-tricks-for-validating-devicetree-sources-with-the-devicetree-schema/
> for instructions).

I will check it.

>
> Best regards,
> Krzysztof
>

Best regards,
Jingbao Qiu
diff mbox series

Patch

diff --git a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
index df40e87ee063..89411c75b89a 100644
--- a/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
+++ b/arch/riscv/boot/dts/sophgo/cv1800b.dtsi
@@ -119,5 +119,13 @@  clint: timer@74000000 {
 			reg = <0x74000000 0x10000>;
 			interrupts-extended = <&cpu0_intc 3>, <&cpu0_intc 7>;
 		};
+
+		rtc: rtc-controller@05026000 {
+			compatible = "sophgo,cv800b-rtc";
+			reg = <0x05026000 0x1000>;
+			interrupts = <17 IRQ_TYPE_LEVEL_HIGH>;
+			interrupt-parent = <&plic>;
+			clocks = <&osc>;
+		};
 	};
 };