| Message ID | 20221005-mt6357-support-v4-5-5d2bb58e6087@baylibre.com |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | Add MediaTek MT6357 PMIC support | expand |
Il 08/11/22 19:43, Alexandre Mergnat ha scritto: > - Convert soc/mediatek/pwrap.txt to soc/mediatek/mediatek,pwrap.yaml > - MT8365 SoC has 2 additional clock items and a yaml schema for its PMIC > - Remove pwrap.txt file > > Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> > --- > .../devicetree/bindings/leds/leds-mt6323.txt | 2 +- > Documentation/devicetree/bindings/mfd/mt6397.txt | 2 +- > .../bindings/soc/mediatek/mediatek,pwrap.yaml | 158 +++++++++++++++++++++ > .../devicetree/bindings/soc/mediatek/pwrap.txt | 75 ---------- > 4 files changed, 160 insertions(+), 77 deletions(-) > > diff --git a/Documentation/devicetree/bindings/leds/leds-mt6323.txt b/Documentation/devicetree/bindings/leds/leds-mt6323.txt > index 45bf9f7d85f3..73353692efa1 100644 > --- a/Documentation/devicetree/bindings/leds/leds-mt6323.txt > +++ b/Documentation/devicetree/bindings/leds/leds-mt6323.txt > @@ -9,7 +9,7 @@ MT6323 PMIC hardware. > For MT6323 MFD bindings see: > Documentation/devicetree/bindings/mfd/mt6397.txt > For MediaTek PMIC wrapper bindings see: > -Documentation/devicetree/bindings/soc/mediatek/pwrap.txt > +Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml > > Required properties: > - compatible : Must be "mediatek,mt6323-led" > diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt > index 79aaf21af8e9..3bee4a42555d 100644 > --- a/Documentation/devicetree/bindings/mfd/mt6397.txt > +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt > @@ -13,7 +13,7 @@ MT6397/MT6323 is a multifunction device with the following sub modules: > It is interfaced to host controller using SPI interface by a proprietary hardware > called PMIC wrapper or pwrap. MT6397/MT6323 MFD is a child device of pwrap. > See the following for pwarp node definitions: > -../soc/mediatek/pwrap.txt > +../soc/mediatek/mediatek,pwrap.yaml > > This document describes the binding for MFD device and its sub module. > > diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml > new file mode 100644 > index 000000000000..fe83458b801a > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml > @@ -0,0 +1,158 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek PMIC Wrapper > + > +maintainers: > + - Alexandre Mergnat <amergnat@baylibre.com> I say that the maintainer for pwrap is Flora Fu <flora.fu@mediatek.com>.... > + > +description: | > + On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface > + is not directly visible to the CPU, but only through the PMIC wrapper > + inside the SoC. The communication between the SoC and the PMIC can > + optionally be encrypted. Also a non standard Dual IO SPI mode can be > + used to increase speed. > + > + IP Pairing > + > + On MT8135 the pins of some SoC internal peripherals can be on the PMIC. > + The signals of these pins are routed over the SPI bus using the pwrap > + bridge. In the binding description below the properties needed for bridging > + are marked with "IP Pairing". These are optional on SoCs which do not support > + IP Pairing > + > +properties: > + compatible: > + oneOf: > + - items: > + - enum: > + - mediatek,mt2701-pwrap ..snip.. > + interrupts: > + maxItems: 1 > + description: IRQ for pwrap in SOC description: PMIC Wrapper interrupt > + > + clocks: true > + > + clock-names: true > + > + resets: > + minItems: 1 > + items: > + - description: PMIC wrapper reset > + - description: IP pairing reset > + > + reset-names: > + minItems: 1 > + items: > + - const: pwrap > + - const: pwrap-bridge > + > + pmic: > + type: object > + > +allOf: > + - if: if `resets` is present, reset-names is *required*... > + properties: > + compatible: > + contains: > + const: mediatek,mt8365-pwrap > + then: > + properties: > + pmic: > + $ref: /schemas/mfd/mediatek,mt6357.yaml# > + > + clocks: > + items: > + - description: SPI bus clock > + - description: Main module clock > + - description: System module clock > + - description: Timer module clock > + clock-names: > + items: > + - const: spi > + - const: wrap > + - const: sys > + - const: tmr For clocks and clock-names... you can declare that globally and set `minItems: 2` for both: this means that the first two items are mandatory, but the last two are not. If you really want to force a validation error when using mediatek,mt8365-pwrap and not providing `sys` and `tmr` clocks, you can just override minItems. > + else: > + properties: > + pmic: > + description: | You don't need this '|'. > + List of child nodes that specify the regulators. > + See ../../mfd/mt6397.txt for more details. > + > + clocks: > + items: > + - description: SPI bus clock > + - description: Main module clock > + clock-names: > + items: > + - const: spi > + - const: wrap > + > +required: > + - compatible > + - reg > + - reg-names > + - interrupts > + - clocks > + - clock-names > + > +additionalProperties: true > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/irq.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/reset/mt8135-resets.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + pwrap@1000f000 { > + compatible = "mediatek,mt8135-pwrap"; > + reg = <0 0x1000f000 0 0x1000>, <0 0x11017000 0 0x1000>; > + reg-names = "pwrap", "pwrap-bridge"; > + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; > + resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>, > + <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>; Fix indentation please resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>, <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>; > + reset-names = "pwrap", "pwrap-bridge"; > + clocks = <&clk26m>, <&clk26m>; ...and also, clocks/clock-names before resets/reset-names please. > + clock-names = "spi", "wrap"; > + > + pmic { > + compatible = "mediatek,mt6397"; > + }; > + }; > + }; Regards, Angelo
On 08/11/2022 19:43, Alexandre Mergnat wrote: > - Convert soc/mediatek/pwrap.txt to soc/mediatek/mediatek,pwrap.yaml > - MT8365 SoC has 2 additional clock items and a yaml schema for its PMIC > - Remove pwrap.txt file > > Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> > --- > .../devicetree/bindings/leds/leds-mt6323.txt | 2 +- > Documentation/devicetree/bindings/mfd/mt6397.txt | 2 +- > .../bindings/soc/mediatek/mediatek,pwrap.yaml | 158 +++++++++++++++++++++ > .../devicetree/bindings/soc/mediatek/pwrap.txt | 75 ---------- > 4 files changed, 160 insertions(+), 77 deletions(-) > > diff --git a/Documentation/devicetree/bindings/leds/leds-mt6323.txt b/Documentation/devicetree/bindings/leds/leds-mt6323.txt > index 45bf9f7d85f3..73353692efa1 100644 > --- a/Documentation/devicetree/bindings/leds/leds-mt6323.txt > +++ b/Documentation/devicetree/bindings/leds/leds-mt6323.txt > @@ -9,7 +9,7 @@ MT6323 PMIC hardware. > For MT6323 MFD bindings see: > Documentation/devicetree/bindings/mfd/mt6397.txt > For MediaTek PMIC wrapper bindings see: > -Documentation/devicetree/bindings/soc/mediatek/pwrap.txt > +Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml > > Required properties: > - compatible : Must be "mediatek,mt6323-led" > diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt > index 79aaf21af8e9..3bee4a42555d 100644 > --- a/Documentation/devicetree/bindings/mfd/mt6397.txt > +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt > @@ -13,7 +13,7 @@ MT6397/MT6323 is a multifunction device with the following sub modules: > It is interfaced to host controller using SPI interface by a proprietary hardware > called PMIC wrapper or pwrap. MT6397/MT6323 MFD is a child device of pwrap. > See the following for pwarp node definitions: > -../soc/mediatek/pwrap.txt > +../soc/mediatek/mediatek,pwrap.yaml > > This document describes the binding for MFD device and its sub module. > > diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml > new file mode 100644 > index 000000000000..fe83458b801a > --- /dev/null > +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml > @@ -0,0 +1,158 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Mediatek PMIC Wrapper > + > +maintainers: > + - Alexandre Mergnat <amergnat@baylibre.com> > + > +description: | > + On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface > + is not directly visible to the CPU, but only through the PMIC wrapper > + inside the SoC. The communication between the SoC and the PMIC can > + optionally be encrypted. Also a non standard Dual IO SPI mode can be > + used to increase speed. > + > + IP Pairing > + > + On MT8135 the pins of some SoC internal peripherals can be on the PMIC. > + The signals of these pins are routed over the SPI bus using the pwrap > + bridge. In the binding description below the properties needed for bridging > + are marked with "IP Pairing". These are optional on SoCs which do not support > + IP Pairing > + > +properties: > + compatible: > + oneOf: > + - items: > + - enum: > + - mediatek,mt2701-pwrap > + - mediatek,mt6765-pwrap > + - mediatek,mt6779-pwrap > + - mediatek,mt6797-pwrap > + - mediatek,mt6873-pwrap > + - mediatek,mt7622-pwrap > + - mediatek,mt8135-pwrap > + - mediatek,mt8173-pwrap > + - mediatek,mt8183-pwrap > + - mediatek,mt8188-pwrap Why no mt8195? > + - mediatek,mt8365-pwrap > + - mediatek,mt8516-pwrap > + - items: > + - enum: > + - mediatek,mt8186-pwrap > + - mediatek,mt8195-pwrap > + - const: syscon > + > + reg: > + minItems: 1 > + items: > + - description: PMIC wrapper registers (mandatory) Drop "(mandatory)" > + - description: IP pairing registers > + > + reg-names: > + minItems: 1 > + items: > + - const: pwrap > + - const: pwrap-bridge > + > + interrupts: > + maxItems: 1 > + description: IRQ for pwrap in SOC Drop description. > + > + clocks: true minItems:2 maxItems: 4 > + > + clock-names: true Ditto > + > + resets: > + minItems: 1 > + items: > + - description: PMIC wrapper reset > + - description: IP pairing reset > + > + reset-names: > + minItems: 1 > + items: > + - const: pwrap > + - const: pwrap-bridge > + > + pmic: > + type: object > + Required properties go here. > +allOf: > + - if: > + properties: > + compatible: > + contains: > + const: mediatek,mt8365-pwrap > + then: > + properties: > + pmic: > + $ref: /schemas/mfd/mediatek,mt6357.yaml# > + > + clocks: > + items: > + - description: SPI bus clock > + - description: Main module clock > + - description: System module clock > + - description: Timer module clock > + clock-names: > + items: > + - const: spi > + - const: wrap > + - const: sys > + - const: tmr > + else: > + properties: > + pmic: > + description: | > + List of child nodes that specify the regulators. This is not correct description. > + See ../../mfd/mt6397.txt for more details. > + > + clocks: > + items: > + - description: SPI bus clock > + - description: Main module clock > + clock-names: > + items: > + - const: spi > + - const: wrap > + > +required: > + - compatible > + - reg > + - reg-names > + - interrupts > + - clocks > + - clock-names > + > +additionalProperties: true This must be false. > + > +examples: > + - | > + #include <dt-bindings/interrupt-controller/irq.h> > + #include <dt-bindings/interrupt-controller/arm-gic.h> > + #include <dt-bindings/reset/mt8135-resets.h> > + > + soc { > + #address-cells = <2>; > + #size-cells = <2>; > + pwrap@1000f000 { > + compatible = "mediatek,mt8135-pwrap"; > + reg = <0 0x1000f000 0 0x1000>, <0 0x11017000 0 0x1000>; > + reg-names = "pwrap", "pwrap-bridge"; > + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; > + resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>, > + <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>; Align. > + reset-names = "pwrap", "pwrap-bridge"; > + clocks = <&clk26m>, <&clk26m>; > + clock-names = "spi", "wrap"; > + > + pmic { > + compatible = "mediatek,mt6397"; Messed up indentation. > + }; Best regards, Krzysztof
Hi Angelo, Le mer. 9 nov. 2022 à 10:55, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> a écrit : > > Il 08/11/22 19:43, Alexandre Mergnat ha scritto: > > +maintainers: > > + - Alexandre Mergnat <amergnat@baylibre.com> > > I say that the maintainer for pwrap is Flora Fu <flora.fu@mediatek.com>.... Flora Fu is the driver maintainer. As described in Documentation/devicetree/bindings/writing-schema.rst: maintainers A DT specific property. Contains a list of email address(es) for maintainers of this binding. My understanding is this field is only for binding maintainers, but not related driver maintainers. Are we aligned ? Regards, Alex
On 15/11/2022 14:54, Alexandre Mergnat wrote: > Hi Angelo, > > Le mer. 9 nov. 2022 à 10:55, AngeloGioacchino Del Regno > <angelogioacchino.delregno@collabora.com> a écrit : >> >> Il 08/11/22 19:43, Alexandre Mergnat ha scritto: >>> +maintainers: >>> + - Alexandre Mergnat <amergnat@baylibre.com> >> >> I say that the maintainer for pwrap is Flora Fu <flora.fu@mediatek.com>.... > > Flora Fu is the driver maintainer. As described in > Documentation/devicetree/bindings/writing-schema.rst: > maintainers > A DT specific property. Contains a list of email address(es) > for maintainers of this binding. > > My understanding is this field is only for binding maintainers, but > not related driver maintainers. Are we aligned ? Usually driver maintainer should be also binding maintainer. You can have more binding maintainers than drivers (and vice versa), but it's less usual to maintain driver and do not care about its Devicetree binding (unless driver is also for ACPI etc. but that's not the case here?). Best regards, Krzysztof
Le mar. 15 nov. 2022 à 15:18, Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> a écrit : > >>> +maintainers: > >>> + - Alexandre Mergnat <amergnat@baylibre.com> > >> > >> I say that the maintainer for pwrap is Flora Fu <flora.fu@mediatek.com>.... > > > > Flora Fu is the driver maintainer. As described in > > Documentation/devicetree/bindings/writing-schema.rst: > > maintainers > > A DT specific property. Contains a list of email address(es) > > for maintainers of this binding. > > > > My understanding is this field is only for binding maintainers, but > > not related driver maintainers. Are we aligned ? > > Usually driver maintainer should be also binding maintainer. You can > have more binding maintainers than drivers (and vice versa), but it's > less usual to maintain driver and do not care about its Devicetree > binding (unless driver is also for ACPI etc. but that's not the case here?). Ok, thanks for the explanations Regards, Alex
diff --git a/Documentation/devicetree/bindings/leds/leds-mt6323.txt b/Documentation/devicetree/bindings/leds/leds-mt6323.txt index 45bf9f7d85f3..73353692efa1 100644 --- a/Documentation/devicetree/bindings/leds/leds-mt6323.txt +++ b/Documentation/devicetree/bindings/leds/leds-mt6323.txt @@ -9,7 +9,7 @@ MT6323 PMIC hardware. For MT6323 MFD bindings see: Documentation/devicetree/bindings/mfd/mt6397.txt For MediaTek PMIC wrapper bindings see: -Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml Required properties: - compatible : Must be "mediatek,mt6323-led" diff --git a/Documentation/devicetree/bindings/mfd/mt6397.txt b/Documentation/devicetree/bindings/mfd/mt6397.txt index 79aaf21af8e9..3bee4a42555d 100644 --- a/Documentation/devicetree/bindings/mfd/mt6397.txt +++ b/Documentation/devicetree/bindings/mfd/mt6397.txt @@ -13,7 +13,7 @@ MT6397/MT6323 is a multifunction device with the following sub modules: It is interfaced to host controller using SPI interface by a proprietary hardware called PMIC wrapper or pwrap. MT6397/MT6323 MFD is a child device of pwrap. See the following for pwarp node definitions: -../soc/mediatek/pwrap.txt +../soc/mediatek/mediatek,pwrap.yaml This document describes the binding for MFD device and its sub module. diff --git a/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml new file mode 100644 index 000000000000..fe83458b801a --- /dev/null +++ b/Documentation/devicetree/bindings/soc/mediatek/mediatek,pwrap.yaml @@ -0,0 +1,158 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/mediatek/mediatek,pwrap.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek PMIC Wrapper + +maintainers: + - Alexandre Mergnat <amergnat@baylibre.com> + +description: | + On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface + is not directly visible to the CPU, but only through the PMIC wrapper + inside the SoC. The communication between the SoC and the PMIC can + optionally be encrypted. Also a non standard Dual IO SPI mode can be + used to increase speed. + + IP Pairing + + On MT8135 the pins of some SoC internal peripherals can be on the PMIC. + The signals of these pins are routed over the SPI bus using the pwrap + bridge. In the binding description below the properties needed for bridging + are marked with "IP Pairing". These are optional on SoCs which do not support + IP Pairing + +properties: + compatible: + oneOf: + - items: + - enum: + - mediatek,mt2701-pwrap + - mediatek,mt6765-pwrap + - mediatek,mt6779-pwrap + - mediatek,mt6797-pwrap + - mediatek,mt6873-pwrap + - mediatek,mt7622-pwrap + - mediatek,mt8135-pwrap + - mediatek,mt8173-pwrap + - mediatek,mt8183-pwrap + - mediatek,mt8188-pwrap + - mediatek,mt8365-pwrap + - mediatek,mt8516-pwrap + - items: + - enum: + - mediatek,mt8186-pwrap + - mediatek,mt8195-pwrap + - const: syscon + + reg: + minItems: 1 + items: + - description: PMIC wrapper registers (mandatory) + - description: IP pairing registers + + reg-names: + minItems: 1 + items: + - const: pwrap + - const: pwrap-bridge + + interrupts: + maxItems: 1 + description: IRQ for pwrap in SOC + + clocks: true + + clock-names: true + + resets: + minItems: 1 + items: + - description: PMIC wrapper reset + - description: IP pairing reset + + reset-names: + minItems: 1 + items: + - const: pwrap + - const: pwrap-bridge + + pmic: + type: object + +allOf: + - if: + properties: + compatible: + contains: + const: mediatek,mt8365-pwrap + then: + properties: + pmic: + $ref: /schemas/mfd/mediatek,mt6357.yaml# + + clocks: + items: + - description: SPI bus clock + - description: Main module clock + - description: System module clock + - description: Timer module clock + clock-names: + items: + - const: spi + - const: wrap + - const: sys + - const: tmr + else: + properties: + pmic: + description: | + List of child nodes that specify the regulators. + See ../../mfd/mt6397.txt for more details. + + clocks: + items: + - description: SPI bus clock + - description: Main module clock + clock-names: + items: + - const: spi + - const: wrap + +required: + - compatible + - reg + - reg-names + - interrupts + - clocks + - clock-names + +additionalProperties: true + +examples: + - | + #include <dt-bindings/interrupt-controller/irq.h> + #include <dt-bindings/interrupt-controller/arm-gic.h> + #include <dt-bindings/reset/mt8135-resets.h> + + soc { + #address-cells = <2>; + #size-cells = <2>; + pwrap@1000f000 { + compatible = "mediatek,mt8135-pwrap"; + reg = <0 0x1000f000 0 0x1000>, <0 0x11017000 0 0x1000>; + reg-names = "pwrap", "pwrap-bridge"; + interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; + resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>, + <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>; + reset-names = "pwrap", "pwrap-bridge"; + clocks = <&clk26m>, <&clk26m>; + clock-names = "spi", "wrap"; + + pmic { + compatible = "mediatek,mt6397"; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt b/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt deleted file mode 100644 index 8424b93c432e..000000000000 --- a/Documentation/devicetree/bindings/soc/mediatek/pwrap.txt +++ /dev/null @@ -1,75 +0,0 @@ -MediaTek PMIC Wrapper Driver - -This document describes the binding for the MediaTek PMIC wrapper. - -On MediaTek SoCs the PMIC is connected via SPI. The SPI master interface -is not directly visible to the CPU, but only through the PMIC wrapper -inside the SoC. The communication between the SoC and the PMIC can -optionally be encrypted. Also a non standard Dual IO SPI mode can be -used to increase speed. - -IP Pairing - -on MT8135 the pins of some SoC internal peripherals can be on the PMIC. -The signals of these pins are routed over the SPI bus using the pwrap -bridge. In the binding description below the properties needed for bridging -are marked with "IP Pairing". These are optional on SoCs which do not support -IP Pairing - -Required properties in pwrap device node. -- compatible: - "mediatek,mt2701-pwrap" for MT2701/7623 SoCs - "mediatek,mt6765-pwrap" for MT6765 SoCs - "mediatek,mt6779-pwrap" for MT6779 SoCs - "mediatek,mt6797-pwrap" for MT6797 SoCs - "mediatek,mt6873-pwrap" for MT6873/8192 SoCs - "mediatek,mt7622-pwrap" for MT7622 SoCs - "mediatek,mt8135-pwrap" for MT8135 SoCs - "mediatek,mt8173-pwrap" for MT8173 SoCs - "mediatek,mt8183-pwrap" for MT8183 SoCs - "mediatek,mt8186-pwrap" for MT8186 SoCs - "mediatek,mt8188-pwrap", "mediatek,mt8195-pwrap" for MT8188 SoCs - "mediatek,mt8195-pwrap" for MT8195 SoCs - "mediatek,mt8365-pwrap" for MT8365 SoCs - "mediatek,mt8516-pwrap" for MT8516 SoCs -- interrupts: IRQ for pwrap in SOC -- reg-names: "pwrap" is required; "pwrap-bridge" is optional. - "pwrap": Main registers base - "pwrap-bridge": bridge base (IP Pairing) -- reg: Must contain an entry for each entry in reg-names. -- clock-names: Must include the following entries: - "spi": SPI bus clock - "wrap": Main module clock - "sys": System module clock (for MT8365 SoC) - "tmr": Timer module clock (for MT8365 SoC) -- clocks: Must contain an entry for each entry in clock-names. - -Optional properities: -- reset-names: Some SoCs include the following entries: - "pwrap" - "pwrap-bridge" (IP Pairing) -- resets: Must contain an entry for each entry in reset-names. -- pmic: Using either MediaTek PMIC MFD as the child device of pwrap - See the following for child node definitions: - Documentation/devicetree/bindings/mfd/mt6397.txt - or the regulator-only device as the child device of pwrap, such as MT6380. - See the following definitions for such kinds of devices. - Documentation/devicetree/bindings/regulator/mt6380-regulator.txt - -Example: - pwrap: pwrap@1000f000 { - compatible = "mediatek,mt8135-pwrap"; - reg = <0 0x1000f000 0 0x1000>, - <0 0x11017000 0 0x1000>; - reg-names = "pwrap", "pwrap-bridge"; - interrupts = <GIC_SPI 128 IRQ_TYPE_LEVEL_HIGH>; - resets = <&infracfg MT8135_INFRA_PMIC_WRAP_RST>, - <&pericfg MT8135_PERI_PWRAP_BRIDGE_SW_RST>; - reset-names = "pwrap", "pwrap-bridge"; - clocks = <&clk26m>, <&clk26m>; - clock-names = "spi", "wrap"; - - pmic { - compatible = "mediatek,mt6397"; - }; - };
- Convert soc/mediatek/pwrap.txt to soc/mediatek/mediatek,pwrap.yaml - MT8365 SoC has 2 additional clock items and a yaml schema for its PMIC - Remove pwrap.txt file Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> --- .../devicetree/bindings/leds/leds-mt6323.txt | 2 +- Documentation/devicetree/bindings/mfd/mt6397.txt | 2 +- .../bindings/soc/mediatek/mediatek,pwrap.yaml | 158 +++++++++++++++++++++ .../devicetree/bindings/soc/mediatek/pwrap.txt | 75 ---------- 4 files changed, 160 insertions(+), 77 deletions(-)