From patchwork Fri Dec 6 13:33:03 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hsin-Hsiung Wang X-Patchwork-Id: 1205052 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (no SPF record) smtp.mailfrom=vger.kernel.org (client-ip=209.132.180.67; helo=vger.kernel.org; envelope-from=linux-rtc-owner@vger.kernel.org; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=mediatek.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=mediatek.com header.i=@mediatek.com header.b="JBJ4YSm1"; dkim-atps=neutral Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by ozlabs.org (Postfix) with ESMTP id 47TtwY4VRHz9sRH for ; Sat, 7 Dec 2019 00:39:09 +1100 (AEDT) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726336AbfLFNio (ORCPT ); Fri, 6 Dec 2019 08:38:44 -0500 Received: from mailgw02.mediatek.com ([210.61.82.184]:60710 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726325AbfLFNin (ORCPT ); Fri, 6 Dec 2019 08:38:43 -0500 X-UUID: 03a3e438f7394e7bbdaf1637691b62be-20191206 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=20DdYNmRn+XgG0rR7STf/vH2MSHtbMKg/TCTvePLOKg=; b=JBJ4YSm19x4Bz43nMUM8kjlUetFYz6ekpo57rk+MhIWimTtT9zflwPoJjkuq2dMqvDvwBwZOB2CXxfMWOm4CW/LUBecW6A1T9yp3XiS3T4db/psAwHV+OA9+x7FTicohWQC8SZRpQdGCewy7pF0akNNPIlanHwBreBDNl7CrZLM=; X-UUID: 03a3e438f7394e7bbdaf1637691b62be-20191206 Received: from mtkcas09.mediatek.inc [(172.21.101.178)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1431212983; Fri, 06 Dec 2019 21:38:39 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 6 Dec 2019 21:38:25 +0800 Received: from mtksdaap41.mediatek.inc (172.21.77.4) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 6 Dec 2019 21:38:00 +0800 From: Hsin-Hsiung Wang To: Lee Jones , Rob Herring , Matthias Brugger , Alexandre Belloni CC: Mark Rutland , Eddie Huang , Sean Wang , Alessandro Zummo , , , , , , , Ran Bi , Hsin-Hsiung Wang Subject: [PATCH v6 6/6] rtc: Add support for the MediaTek MT6358 RTC Date: Fri, 6 Dec 2019 21:33:03 +0800 Message-ID: <1575639183-17606-7-git-send-email-hsin-hsiung.wang@mediatek.com> X-Mailer: git-send-email 2.6.4 In-Reply-To: <1575639183-17606-1-git-send-email-hsin-hsiung.wang@mediatek.com> References: <1575639183-17606-1-git-send-email-hsin-hsiung.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-rtc-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-rtc@vger.kernel.org From: Ran Bi This add support for the MediaTek MT6358 RTC. Driver using compatible data to store different RTC_WRTGR address offset. Signed-off-by: Ran Bi Signed-off-by: Hsin-Hsiung Wang Acked-by: Alexandre Belloni --- drivers/rtc/rtc-mt6397.c | 38 ++++++++++++++++++++++++++++++-------- 1 file changed, 30 insertions(+), 8 deletions(-) diff --git a/drivers/rtc/rtc-mt6397.c b/drivers/rtc/rtc-mt6397.c index b216bdc..631e275 100644 --- a/drivers/rtc/rtc-mt6397.c +++ b/drivers/rtc/rtc-mt6397.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -19,7 +20,8 @@ #define RTC_BBPU 0x0000 #define RTC_BBPU_CBUSY BIT(6) -#define RTC_WRTGR 0x003c +#define RTC_WRTGR_MT6358 0x3a +#define RTC_WRTGR_MT6397 0x3c #define RTC_IRQ_STA 0x0002 #define RTC_IRQ_STA_AL BIT(0) @@ -63,6 +65,10 @@ #define RTC_NUM_YEARS 128 #define RTC_MIN_YEAR_OFFSET (RTC_MIN_YEAR - RTC_BASE_YEAR) +struct mtk_rtc_data { + u32 wrtgr; +}; + struct mt6397_rtc { struct device *dev; struct rtc_device *rtc_dev; @@ -70,15 +76,34 @@ struct mt6397_rtc { struct regmap *regmap; int irq; u32 addr_base; + const struct mtk_rtc_data *data; +}; + +static const struct mtk_rtc_data mt6358_rtc_data = { + .wrtgr = RTC_WRTGR_MT6358, }; +static const struct mtk_rtc_data mt6397_rtc_data = { + .wrtgr = RTC_WRTGR_MT6397, +}; + +static const struct of_device_id mt6397_rtc_of_match[] = { + { .compatible = "mediatek,mt6358-rtc", + .data = (void *)&mt6358_rtc_data, }, + { .compatible = "mediatek,mt6397-rtc", + .data = (void *)&mt6397_rtc_data, }, + {} +}; +MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match); + static int mtk_rtc_write_trigger(struct mt6397_rtc *rtc) { unsigned long timeout = jiffies + HZ; int ret; u32 data; - ret = regmap_write(rtc->regmap, rtc->addr_base + RTC_WRTGR, 1); + ret = regmap_write(rtc->regmap, + rtc->addr_base + rtc->data->wrtgr, 1); if (ret < 0) return ret; @@ -333,6 +358,9 @@ static int mtk_rtc_probe(struct platform_device *pdev) res = platform_get_resource(pdev, IORESOURCE_MEM, 0); rtc->addr_base = res->start; + rtc->data = (struct mtk_rtc_data *) + of_device_get_match_data(&pdev->dev); + rtc->irq = platform_get_irq(pdev, 0); if (rtc->irq < 0) return rtc->irq; @@ -406,12 +434,6 @@ static int mt6397_rtc_resume(struct device *dev) static SIMPLE_DEV_PM_OPS(mt6397_pm_ops, mt6397_rtc_suspend, mt6397_rtc_resume); -static const struct of_device_id mt6397_rtc_of_match[] = { - { .compatible = "mediatek,mt6397-rtc", }, - { } -}; -MODULE_DEVICE_TABLE(of, mt6397_rtc_of_match); - static struct platform_driver mtk_rtc_driver = { .driver = { .name = "mt6397-rtc",