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[62.209.51.94]) by gmr-mx.google.com with ESMTPS id m17si388279wma.1.2016.12.02.06.12.38 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 02 Dec 2016 06:12:38 -0800 (PST) Received-SPF: pass (google.com: domain of amelie.delaunay@st.com designates 62.209.51.94 as permitted sender) client-ip=62.209.51.94; Received: from pps.filterd (m0046668.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.11/8.16.0.11) with SMTP id uB2EC3JZ006587; Fri, 2 Dec 2016 15:12:25 +0100 Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-.pphosted.com with ESMTP id 26y0r45t82-1 (version=TLSv1 cipher=ECDHE-RSA-AES256-SHA bits=256 verify=NOT); Fri, 02 Dec 2016 15:12:25 +0100 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 53EFA43; Fri, 2 Dec 2016 14:12:24 +0000 (GMT) Received: from Webmail-eu.st.com (Safex1hubcas21.st.com [10.75.90.44]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id 2BD232D45; Fri, 2 Dec 2016 14:12:24 +0000 (GMT) Received: from localhost (10.201.23.160) by Webmail-ga.st.com (10.75.90.48) with Microsoft SMTP Server (TLS) id 14.3.294.0; Fri, 2 Dec 2016 15:12:24 +0100 From: Amelie Delaunay To: , , , , , , CC: , , , , , Subject: [rtc-linux] [PATCH 5/8] ARM: dts: stm32: enable RTC on stm32f429-disco Date: Fri, 2 Dec 2016 15:09:58 +0100 Message-ID: <1480687801-19525-7-git-send-email-amelie.delaunay@st.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1480687801-19525-2-git-send-email-amelie.delaunay@st.com> References: <1480687801-19525-2-git-send-email-amelie.delaunay@st.com> MIME-Version: 1.0 X-Originating-IP: [10.201.23.160] X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2016-12-02_10:, , signatures=0 X-Original-Sender: amelie.delaunay@st.com X-Original-Authentication-Results: gmr-mx.google.com; spf=pass (google.com: domain of amelie.delaunay@st.com designates 62.209.51.94 as permitted sender) smtp.mailfrom=amelie.delaunay@st.com Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Spam-Checked-In-Group: rtc-linux@googlegroups.com X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , This patch enables RTC on stm32f429-disco with LSI as clock source because X2 crystal for LSE is not fitted by default. Signed-off-by: Amelie Delaunay --- arch/arm/boot/dts/stm32f429-disco.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm/boot/dts/stm32f429-disco.dts b/arch/arm/boot/dts/stm32f429-disco.dts index b6e63d8..49eddf6 100644 --- a/arch/arm/boot/dts/stm32f429-disco.dts +++ b/arch/arm/boot/dts/stm32f429-disco.dts @@ -94,6 +94,12 @@ clock-frequency = <8000000>; }; +&rtc { + assigned-clocks = <&rcc 1 CLK_RTC>; + assigned-clock-parents = <&rcc 1 CLK_LSI>; + status = "okay"; +}; + &usart1 { pinctrl-0 = <&usart1_pins_a>; pinctrl-names = "default";