From patchwork Mon Sep 22 15:42:41 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 392029 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from mail-lb0-x23b.google.com (mail-lb0-x23b.google.com [IPv6:2a00:1450:4010:c04::23b]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id B885F140174 for ; Tue, 23 Sep 2014 01:42:56 +1000 (EST) Received: by mail-lb0-f187.google.com with SMTP id z12sf540547lbi.4 for ; Mon, 22 Sep 2014 08:42:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlegroups.com; s=20120806; h=mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :reply-to:precedence:mailing-list:list-id:list-post:list-help :list-archive:sender:list-subscribe:list-unsubscribe:content-type; bh=HUufBq/uOdCV99MTEnffPdrGsWwnbLr3QyoFhZ78b9M=; b=psPrLMUvUi9yeS5Q7VA5guAc6Z+jl6H1ycpyVJTGttsKdAnzbJfLTHrrANW3TRhpEC rppvOZRSbb6EIAtpstACkR8+8tW3rO1ph+5xXtlpflrj9Jwekoppi5sHPjqP+h99jGY1 wp3saxlQSrF8i6+HChbZGdOQG+mMLcfaKS8AT146LWkwquy66dumzUh1gPdGIp56rgcF vL4VgLCTbzi0MNvFeekVnP/krToT1raePMi7ryRD6PmlFi260iMKSulKunq0AyCA5e2D 07wuLcydjsxmAfQcpJx0zyivj4VbTKbXwFX2LdceSI2jkRoqOtesHHdebfZRyx4dEpyc 6/MQ== X-Received: by 10.152.6.228 with SMTP id e4mr12286laa.33.1411400573983; Mon, 22 Sep 2014 08:42:53 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: rtc-linux@googlegroups.com Received: by 10.152.87.80 with SMTP id v16ls554609laz.21.gmail; Mon, 22 Sep 2014 08:42:53 -0700 (PDT) X-Received: by 10.112.151.3 with SMTP id um3mr513350lbb.15.1411400573500; Mon, 22 Sep 2014 08:42:53 -0700 (PDT) Received: from mail.free-electrons.com (top.free-electrons.com. [176.31.233.9]) by gmr-mx.google.com with ESMTP id go4si532899wib.3.2014.09.22.08.42.53 for ; Mon, 22 Sep 2014 08:42:53 -0700 (PDT) Received-SPF: softfail (google.com: domain of transitioning boris.brezillon@free-electrons.com does not designate 176.31.233.9 as permitted sender) client-ip=176.31.233.9; Received: by mail.free-electrons.com (Postfix, from userid 106) id 3621C171B; Mon, 22 Sep 2014 17:42:54 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 22FF7163A; Mon, 22 Sep 2014 17:42:53 +0200 (CEST) From: Boris BREZILLON To: Nicolas Ferre , Jean-Christophe Plagniol-Villard , Alexandre Belloni , Andrew Victor , Alessandro Zummo , rtc-linux@googlegroups.com, Samuel Ortiz , Lee Jones , Johan Hovold Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Boris BREZILLON Subject: [rtc-linux] [PATCH v6 7/9] rtc: at91sam9: use clk API instead of relying on AT91_SLOW_CLOCK Date: Mon, 22 Sep 2014 17:42:41 +0200 Message-Id: <1411400563-570-8-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1411400563-570-1-git-send-email-boris.brezillon@free-electrons.com> References: <1411400563-570-1-git-send-email-boris.brezillon@free-electrons.com> X-Original-Sender: boris.brezillon@free-electrons.com X-Original-Authentication-Results: gmr-mx.google.com; spf=softfail (google.com: domain of transitioning boris.brezillon@free-electrons.com does not designate 176.31.233.9 as permitted sender) smtp.mail=boris.brezillon@free-electrons.com Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , The RTT block is using the slow clock which is accessible through the clk API. Use the clk API to retrieve, enable and get the slow clk rate instead of the AT91_SLOW_CLOCK macro (which hardcodes the slow clk rate). Doing this allows us to reference the clk thus preventing the CCF from disabling it during the "disable unused" phase. Signed-off-by: Boris BREZILLON Acked-by: Alexandre Belloni Acked-by: Nicolas Ferre --- drivers/rtc/rtc-at91sam9.c | 28 ++++++++++++++++++++++++---- 1 file changed, 24 insertions(+), 4 deletions(-) diff --git a/drivers/rtc/rtc-at91sam9.c b/drivers/rtc/rtc-at91sam9.c index 902cd01..d20e118 100644 --- a/drivers/rtc/rtc-at91sam9.c +++ b/drivers/rtc/rtc-at91sam9.c @@ -23,6 +23,7 @@ #include #include #include +#include /* * This driver uses two configurable hardware resources that live in the @@ -61,8 +62,6 @@ #define AT91_RTT_ALMS (1 << 0) /* Real-time Alarm Status */ #define AT91_RTT_RTTINC (1 << 1) /* Real-time Timer Increment */ -#define AT91_SLOW_CLOCK 32768 - /* * We store ALARM_DISABLED in ALMV to record that no alarm is set. * It's also the reset value for that field. @@ -77,6 +76,7 @@ struct sam9_rtc { struct regmap *gpbr; unsigned int gpbr_offset; int irq; + struct clk *sclk; }; #define rtt_readl(rtc, field) \ @@ -328,6 +328,7 @@ static int at91_rtc_probe(struct platform_device *pdev) struct sam9_rtc *rtc; int ret, irq; u32 mr; + unsigned int sclk_rate; irq = platform_get_irq(pdev, 0); if (irq < 0) { @@ -385,11 +386,27 @@ static int at91_rtc_probe(struct platform_device *pdev) return -ENOMEM; } + rtc->sclk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(rtc->sclk)) + return PTR_ERR(rtc->sclk); + + sclk_rate = clk_get_rate(rtc->sclk); + if (!sclk_rate || sclk_rate > AT91_RTT_RTTRST) { + dev_err(&pdev->dev, "Invalid slow clock rate"); + return -EINVAL; + } + + ret = clk_prepare_enable(rtc->sclk); + if (ret) { + dev_err(&pdev->dev, "Could not enable slow clock"); + return ret; + } + mr = rtt_readl(rtc, MR); /* unless RTT is counting at 1 Hz, re-initialize it */ - if ((mr & AT91_RTT_RTPRES) != AT91_SLOW_CLOCK) { - mr = AT91_RTT_RTTRST | (AT91_SLOW_CLOCK & AT91_RTT_RTPRES); + if ((mr & AT91_RTT_RTPRES) != sclk_rate) { + mr = AT91_RTT_RTTRST | (sclk_rate & AT91_RTT_RTPRES); gpbr_writel(rtc, 0); } @@ -434,6 +451,9 @@ static int at91_rtc_remove(struct platform_device *pdev) /* disable all interrupts */ rtt_writel(rtc, MR, mr & ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN)); + if (!IS_ERR(rtc->sclk)) + clk_disable_unprepare(rtc->sclk); + return 0; }