From patchwork Tue Sep 9 09:30:33 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 387221 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from mail-wi0-x240.google.com (mail-wi0-x240.google.com [IPv6:2a00:1450:400c:c05::240]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 8FF57140187 for ; Tue, 9 Sep 2014 19:30:51 +1000 (EST) Received: by mail-wi0-f192.google.com with SMTP id e4sf1679978wiv.19 for ; Tue, 09 Sep 2014 02:30:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlegroups.com; s=20120806; h=mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :reply-to:precedence:mailing-list:list-id:list-post:list-help :list-archive:sender:list-subscribe:list-unsubscribe:content-type; bh=y8NasAQRKgWq4ncQ3ZHz8XLC2vdTebpxChnIo6egibg=; b=a+iY3FnS9f7KOkfA7173HBI4AP2ihR0XqIvpsDAPC1tntl5kwMt7cTWAK4d6Rbg6n1 YKwQ5D/CyFn5OCPd+ayN/HjIvTjSLIAbJDgLjUuTeipzi2ZZZilxBCqBRklVHTeGZyZ5 mccOuaGWP8pQzSYKaBkIlqNM/yVFZ4IiQJ4TZamg8io3vcMJqLit8KyXGr4AUwlyE1xk IaNs/oYV6Cn4ZPfAuZ1Xz6h3SJrdgVN6ev0fKtPo9Pd61gvqP1BZt442lmGpGOocwbzU 7BZYvs/OZm2uWDH1SXDh3FF++6EKgNnq1UFYMUM8kcZjdHTVeEMXkwxq/UaAxG7p6mF2 vJxA== X-Received: by 10.152.43.137 with SMTP id w9mr13213lal.21.1410255048752; Tue, 09 Sep 2014 02:30:48 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: rtc-linux@googlegroups.com Received: by 10.152.116.18 with SMTP id js18ls250179lab.69.gmail; Tue, 09 Sep 2014 02:30:47 -0700 (PDT) X-Received: by 10.152.3.134 with SMTP id c6mr236395lac.5.1410255047777; Tue, 09 Sep 2014 02:30:47 -0700 (PDT) Received: from mail.free-electrons.com (top.free-electrons.com. [176.31.233.9]) by gmr-mx.google.com with ESMTP id gk5si802068wic.1.2014.09.09.02.30.47 for ; Tue, 09 Sep 2014 02:30:47 -0700 (PDT) Received-SPF: softfail (google.com: domain of transitioning boris.brezillon@free-electrons.com does not designate 176.31.233.9 as permitted sender) client-ip=176.31.233.9; Received: by mail.free-electrons.com (Postfix, from userid 106) id 619A32694; Tue, 9 Sep 2014 11:30:47 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT, URIBL_BLOCKED shortcircuit=ham autolearn=disabled version=3.4.0 Received: from localhost.localdomain (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 2D0F8135B; Tue, 9 Sep 2014 11:30:46 +0200 (CEST) From: Boris BREZILLON To: Nicolas Ferre , Jean-Christophe Plagniol-Villard , Alexandre Belloni , Andrew Victor , Alessandro Zummo , rtc-linux@googlegroups.com Cc: Rob Herring , Pawel Moll , Mark Rutland , Ian Campbell , Kumar Gala , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Boris BREZILLON Subject: [rtc-linux] [PATCH v2 4/6] ARM: at91: add clk_lookup entry for RTT devices Date: Tue, 9 Sep 2014 11:30:33 +0200 Message-Id: <1410255035-26775-5-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1410255035-26775-1-git-send-email-boris.brezillon@free-electrons.com> References: <1410255035-26775-1-git-send-email-boris.brezillon@free-electrons.com> X-Original-Sender: boris.brezillon@free-electrons.com X-Original-Authentication-Results: gmr-mx.google.com; spf=softfail (google.com: domain of transitioning boris.brezillon@free-electrons.com does not designate 176.31.233.9 as permitted sender) smtp.mail=boris.brezillon@free-electrons.com Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: , List-Unsubscribe: , First export the clk32k clk. Then add clk_lookup entries for RTT devices so that rtc-at91sam9 driver can retrieve and manipulate the slow clk. Signed-off-by: Boris BREZILLON --- arch/arm/mach-at91/at91sam9260.c | 2 ++ arch/arm/mach-at91/at91sam9261.c | 2 ++ arch/arm/mach-at91/at91sam9263.c | 4 ++++ arch/arm/mach-at91/at91sam9g45.c | 2 ++ arch/arm/mach-at91/at91sam9rl.c | 2 ++ arch/arm/mach-at91/clock.c | 2 +- arch/arm/mach-at91/clock.h | 1 + 7 files changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index 3477ba9..a853d4c 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c @@ -217,6 +217,7 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("pclk", "fffbc000.ssc", &ssc_clk), CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk), CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9g20.0", &twi_clk), + CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k), /* more usart lookup table for DT entries */ CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck), CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk), @@ -237,6 +238,7 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("mci_clk", "fffa8000.mmc", &mmc_clk), CLKDEV_CON_DEV_ID("spi_clk", "fffc8000.spi", &spi0_clk), CLKDEV_CON_DEV_ID("spi_clk", "fffcc000.spi", &spi1_clk), + CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k), /* fake hclk clock */ CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), CLKDEV_CON_ID("pioA", &pioA_clk), diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index fb164a5..3f5a299 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c @@ -192,6 +192,7 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_ID("pioA", &pioA_clk), CLKDEV_CON_ID("pioB", &pioB_clk), CLKDEV_CON_ID("pioC", &pioC_clk), + CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k), /* more lookup table for DT entries */ CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck), CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk), @@ -209,6 +210,7 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID(NULL, "fffff400.gpio", &pioA_clk), CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk), CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk), + CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k), }; static struct clk_lookup usart_clocks_lookups[] = { diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 810fa5f..bef5b96 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c @@ -201,6 +201,8 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), CLKDEV_CON_DEV_ID(NULL, "i2c-at91sam9260.0", &twi_clk), CLKDEV_CON_DEV_ID(NULL, "at91sam9rl-pwm", &pwm_clk), + CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k), + CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.1", &clk32k), /* fake hclk clock */ CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), CLKDEV_CON_ID("pioA", &pioA_clk), @@ -227,6 +229,8 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioCDE_clk), CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioCDE_clk), CLKDEV_CON_DEV_ID(NULL, "fffb8000.pwm", &pwm_clk), + CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k), + CLKDEV_CON_DEV_ID(NULL, "fffffd50.rtc", &clk32k), }; static struct clk_lookup usart_clocks_lookups[] = { diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 9d45496..69fdfcc 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c @@ -253,6 +253,7 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID(NULL, "atmel_tdes", &aestdessha_clk), CLKDEV_CON_DEV_ID(NULL, "atmel_aes", &aestdessha_clk), CLKDEV_CON_DEV_ID(NULL, "at91sam9rl-pwm", &pwm_clk), + CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k), /* more usart lookup table for DT entries */ CLKDEV_CON_DEV_ID("usart", "ffffee00.serial", &mck), CLKDEV_CON_DEV_ID("usart", "fff8c000.serial", &usart0_clk), @@ -279,6 +280,7 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioC_clk), CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioDE_clk), CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioDE_clk), + CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k), CLKDEV_CON_ID("pioA", &pioA_clk), CLKDEV_CON_ID("pioB", &pioB_clk), diff --git a/arch/arm/mach-at91/at91sam9rl.c b/arch/arm/mach-at91/at91sam9rl.c index 878d501..a82dc61 100644 --- a/arch/arm/mach-at91/at91sam9rl.c +++ b/arch/arm/mach-at91/at91sam9rl.c @@ -205,6 +205,7 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_ID("pioB", &pioB_clk), CLKDEV_CON_ID("pioC", &pioC_clk), CLKDEV_CON_ID("pioD", &pioD_clk), + CLKDEV_CON_DEV_ID(NULL, "rtc-at91sam9.0", &clk32k), /* more lookup table for DT entries */ CLKDEV_CON_DEV_ID("usart", "fffff200.serial", &mck), CLKDEV_CON_DEV_ID("usart", "fffb0000.serial", &usart0_clk), @@ -223,6 +224,7 @@ static struct clk_lookup periph_clocks_lookups[] = { CLKDEV_CON_DEV_ID(NULL, "fffff600.gpio", &pioB_clk), CLKDEV_CON_DEV_ID(NULL, "fffff800.gpio", &pioC_clk), CLKDEV_CON_DEV_ID(NULL, "fffffa00.gpio", &pioD_clk), + CLKDEV_CON_DEV_ID(NULL, "fffffd20.rtc", &clk32k), CLKDEV_CON_ID("adc_clk", &tsc_clk), }; diff --git a/arch/arm/mach-at91/clock.c b/arch/arm/mach-at91/clock.c index 034529d..f5cfed75 100644 --- a/arch/arm/mach-at91/clock.c +++ b/arch/arm/mach-at91/clock.c @@ -115,7 +115,7 @@ static u32 at91_pllb_usb_init; * 48 MHz (unless no USB function clocks are needed). The main clock and * both PLLs are turned off to run in "slow clock mode" (system suspend). */ -static struct clk clk32k = { +struct clk clk32k = { .name = "clk32k", .rate_hz = AT91_SLOW_CLOCK, .users = 1, /* always on */ diff --git a/arch/arm/mach-at91/clock.h b/arch/arm/mach-at91/clock.h index a98a39b..6eb825a 100644 --- a/arch/arm/mach-at91/clock.h +++ b/arch/arm/mach-at91/clock.h @@ -34,6 +34,7 @@ struct clk { extern int __init clk_register(struct clk *clk); extern struct clk mck; extern struct clk utmi_clk; +extern struct clk clk32k; #define CLKDEV_CON_ID(_id, _clk) \ { \