From patchwork Tue May 6 14:28:01 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Boris Brezillon X-Patchwork-Id: 346214 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from mail-wg0-f59.google.com (mail-wg0-f59.google.com [74.125.82.59]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 1FE9D14008A for ; Wed, 7 May 2014 00:28:08 +1000 (EST) Received: by mail-wg0-f59.google.com with SMTP id x12sf683590wgg.4 for ; Tue, 06 May 2014 07:28:04 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlegroups.com; s=20120806; h=mime-version:from:to:cc:subject:date:message-id:in-reply-to :references:x-original-sender:x-original-authentication-results :reply-to:precedence:mailing-list:list-id:list-post:list-help :list-archive:sender:list-subscribe:list-unsubscribe:content-type; bh=QqQslXrSf9NWh/dm5sTsXTYu5RcdF3XW/nOhn7Aau4c=; b=BvaavHPLMVLREC4YgJyO4dtkKuc9tPCxGYSLUYTb0htl1eBkXP3M19/JXT4vBcpETc /zRdHXuV06VcxIhPhNgwEFNii6xUZyQGFXkWlNA6ZQmT6XcOsgTXvZRgZJORm1bWJX7x Lt5fA5LjvwjaZn+njoTfSaUPKkASxxkQrhH19poPzF2AdxBIhTOxTZNr1XoNMOkC3Raf dvb9VhNwTL/C8ZHrgK1lILdRBf4Zeo9o1ZHp0FKNHNVmtpiPWW/8FI8RjBuRgiHP2a3q Xr1wsqTokvXwYP0RrcQ4+A9VBXqD8kUxmRiSyKuwD9aDD4lToL/ABTY5YI0bGJA+QayH 6auA== X-Received: by 10.180.99.136 with SMTP id eq8mr31320wib.14.1399386484822; Tue, 06 May 2014 07:28:04 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: rtc-linux@googlegroups.com Received: by 10.180.76.238 with SMTP id n14ls147235wiw.11.canary; Tue, 06 May 2014 07:28:04 -0700 (PDT) X-Received: by 10.112.155.67 with SMTP id vu3mr431631lbb.9.1399386484107; Tue, 06 May 2014 07:28:04 -0700 (PDT) Received: from mail.free-electrons.com (top.free-electrons.com. [176.31.233.9]) by gmr-mx.google.com with ESMTP id q13si519171wiw.1.2014.05.06.07.28.04 for ; Tue, 06 May 2014 07:28:04 -0700 (PDT) Received-SPF: softfail (google.com: domain of transitioning boris.brezillon@free-electrons.com does not designate 176.31.233.9 as permitted sender) client-ip=176.31.233.9; Received: by mail.free-electrons.com (Postfix, from userid 106) id A29CD1240; Tue, 6 May 2014 16:28:02 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.3.2 (2011-06-06) on mail.free-electrons.com X-Spam-Level: X-Spam-Status: No, score=-1.0 required=5.0 tests=ALL_TRUSTED,SHORTCIRCUIT shortcircuit=ham autolearn=disabled version=3.3.2 Received: from localhost.localdomain (col31-4-88-188-83-94.fbx.proxad.net [88.188.83.94]) by mail.free-electrons.com (Postfix) with ESMTPSA id 0F22F123F; Tue, 6 May 2014 16:28:02 +0200 (CEST) From: Boris BREZILLON To: Bryan Evenson Cc: Andrew Victor , Nicolas Ferre , Jean-Christophe Plagniol-Villard , linux-arm-kernel@lists.infradead.org, Alessandro Zummo , rtc-linux@googlegroups.com, linux-kernel@vger.kernel.org, Boris BREZILLON Subject: [rtc-linux] [PATCH] rtc: rtc-at91rm9200: fix infinite wait for ACKUPD irq Date: Tue, 6 May 2014 16:28:01 +0200 Message-Id: <1399386481-18643-1-git-send-email-boris.brezillon@free-electrons.com> X-Mailer: git-send-email 1.8.3.2 In-Reply-To: <94c06375c1b44c8eb5233b0ccf2e4b13@BY2PR05MB048.namprd05.prod.outlook.com> References: <94c06375c1b44c8eb5233b0ccf2e4b13@BY2PR05MB048.namprd05.prod.outlook.com> X-Original-Sender: boris.brezillon@free-electrons.com X-Original-Authentication-Results: gmr-mx.google.com; spf=softfail (google.com: domain of transitioning boris.brezillon@free-electrons.com does not designate 176.31.233.9 as permitted sender) smtp.mail=boris.brezillon@free-electrons.com Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: Sender: rtc-linux@googlegroups.com List-Subscribe: , List-Unsubscribe: , The rtc user must wait at least 1 sec between each time/calandar update (see atmel's datasheet chapter "Updating Time/Calendar"). Use the 1Hz interrupt to update the at91_rtc_upd_rdy flag and wait for the at91_rtc_wait_upd_rdy event if the rtc is not ready. Signed-off-by: Boris BREZILLON Reported-by: Bryan Evenson --- Hello Bryan, I reproduced your bug (using your script) and this patch seems to fix the problem. Could you try it and let me know if it works for you ? Best Regards, Boris drivers/rtc/rtc-at91rm9200.c | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c index 3281c90..e3fe54c 100644 --- a/drivers/rtc/rtc-at91rm9200.c +++ b/drivers/rtc/rtc-at91rm9200.c @@ -48,11 +48,13 @@ struct at91_rtc_config { static const struct at91_rtc_config *at91_rtc_config; static DECLARE_COMPLETION(at91_rtc_updated); +static DECLARE_COMPLETION(at91_rtc_wait_upd_rdy); static unsigned int at91_alarm_year = AT91_RTC_EPOCH; static void __iomem *at91_rtc_regs; static int irq; static DEFINE_SPINLOCK(at91_rtc_lock); static u32 at91_rtc_shadow_imr; +static bool at91_rtc_upd_rdy; static void at91_rtc_write_ier(u32 mask) { @@ -161,6 +163,8 @@ static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) 1900 + tm->tm_year, tm->tm_mon, tm->tm_mday, tm->tm_hour, tm->tm_min, tm->tm_sec); + wait_for_completion(&at91_rtc_wait_upd_rdy); + /* Stop Time/Calendar from counting */ cr = at91_rtc_read(AT91_RTC_CR); at91_rtc_write(AT91_RTC_CR, cr | AT91_RTC_UPDCAL | AT91_RTC_UPDTIM); @@ -183,6 +187,7 @@ static int at91_rtc_settime(struct device *dev, struct rtc_time *tm) /* Restart Time/Calendar */ cr = at91_rtc_read(AT91_RTC_CR); + at91_rtc_upd_rdy = 0; at91_rtc_write(AT91_RTC_CR, cr & ~(AT91_RTC_UPDCAL | AT91_RTC_UPDTIM)); return 0; @@ -290,8 +295,13 @@ static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id) if (rtsr) { /* this interrupt is shared! Is it ours? */ if (rtsr & AT91_RTC_ALARM) events |= (RTC_AF | RTC_IRQF); - if (rtsr & AT91_RTC_SECEV) + if (rtsr & AT91_RTC_SECEV) { events |= (RTC_UF | RTC_IRQF); + if (!at91_rtc_upd_rdy) { + at91_rtc_upd_rdy = 1; + complete(&at91_rtc_wait_upd_rdy); + } + } if (rtsr & AT91_RTC_ACKUPD) complete(&at91_rtc_updated); @@ -413,6 +423,8 @@ static int __init at91_rtc_probe(struct platform_device *pdev) return PTR_ERR(rtc); platform_set_drvdata(pdev, rtc); + /* Enable 1Hz events */ + at91_rtc_write_ier(AT91_RTC_SECEV); dev_info(&pdev->dev, "AT91 Real Time Clock driver.\n"); return 0; }