From patchwork Fri Dec 21 09:28:55 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Laxman Dewangan X-Patchwork-Id: 207772 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from mail-vb0-f61.google.com (mail-vb0-f61.google.com [209.85.212.61]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id 794572C0090 for ; Fri, 21 Dec 2012 20:29:14 +1100 (EST) Received: by mail-vb0-f61.google.com with SMTP id fs19sf2184421vbb.6 for ; Fri, 21 Dec 2012 01:29:12 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlegroups.com; s=20120806; h=x-received:x-beenthere:x-received:x-received:received-spf :x-pgp-universal:from:to:cc:subject:date:message-id:x-mailer :mime-version:x-original-sender:x-original-authentication-results :reply-to:precedence:mailing-list:list-id:x-google-group-id :list-post:list-help:list-archive:sender:list-subscribe :list-unsubscribe:content-type; bh=rnTKqGPwwkfNRBcwx0iCLgeA6fAyxS/qJxs86ZsVgE8=; b=IEbZvn2ae55DE0oX8JeA0YmYv0r813RhsQBakJernipRhl/8hSK6MIbzDm+rgsJzjE rf7kcA95JbfjmMipmjW3Fy7guCTlimb+dAaO8bC3iCjcb03JIR2iZfLVJdlQ8pqUHwtn scOvIp8BbRsEMEXP+6wZbwLT4xkV9Du7Ap2s66ifbQuo0tTK0F4MyI8ioPRYV8O/4Eiv PAnNZ0Lb+tYkAVoQtNFND80weEKlaDlU9rLJFPZNq3xzL8wIKYb2NXvynFnrQBsCx+wh jeLSz29a0Sokj5Hy3e4AjqoH8FCXyGyqk1/rcbbYJa5c1Z0/RnVyO7FDWo0SZiRlcZzT PUkQ== X-Received: by 10.50.87.197 with SMTP id ba5mr2494984igb.13.1356082151730; Fri, 21 Dec 2012 01:29:11 -0800 (PST) X-BeenThere: rtc-linux@googlegroups.com Received: by 10.50.188.133 with SMTP id ga5ls2987148igc.27.gmail; Fri, 21 Dec 2012 01:29:10 -0800 (PST) X-Received: by 10.66.85.168 with SMTP id i8mr2233981paz.21.1356082150681; Fri, 21 Dec 2012 01:29:10 -0800 (PST) X-Received: by 10.66.85.168 with SMTP id i8mr2233980paz.21.1356082150667; Fri, 21 Dec 2012 01:29:10 -0800 (PST) Received: from hqemgate03.nvidia.com (hqemgate03.nvidia.com. [216.228.121.140]) by gmr-mx.google.com with ESMTPS id uz6si2217075pbc.0.2012.12.21.01.29.10 (version=TLSv1/SSLv3 cipher=OTHER); Fri, 21 Dec 2012 01:29:10 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of ldewangan@nvidia.com designates 216.228.121.140 as permitted sender) client-ip=216.228.121.140; Received: from hqnvupgp06.nvidia.com (Not Verified[216.228.121.13]) by hqemgate03.nvidia.com id ; Fri, 21 Dec 2012 01:32:38 -0800 Received: from hqemhub01.nvidia.com ([172.17.108.22]) by hqnvupgp06.nvidia.com (PGP Universal service); Fri, 21 Dec 2012 01:27:21 -0800 X-PGP-Universal: processed; by hqnvupgp06.nvidia.com on Fri, 21 Dec 2012 01:27:21 -0800 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by hqemhub01.nvidia.com (172.20.150.30) with Microsoft SMTP Server id 8.3.279.1; Fri, 21 Dec 2012 01:29:02 -0800 Received: from thelma.nvidia.com (Not Verified[172.16.212.77]) by hqnvemgw02.nvidia.com with MailMarshal (v6,7,2,8378) id ; Fri, 21 Dec 2012 01:29:01 -0800 Received: from ldewangan-ubuntu.nvidia.com ([10.19.65.30]) by thelma.nvidia.com (8.13.8+Sun/8.8.8) with ESMTP id qBL9Sw8v003083; Fri, 21 Dec 2012 01:28:59 -0800 (PST) From: Laxman Dewangan To: CC: , , , Laxman Dewangan Subject: [rtc-linux] [PATCH] rtc: add RTC driver for TPS6586x Date: Fri, 21 Dec 2012 14:58:55 +0530 Message-ID: <1356082135-14549-1-git-send-email-ldewangan@nvidia.com> X-Mailer: git-send-email 1.7.1.1 MIME-Version: 1.0 X-Original-Sender: ldewangan@nvidia.com X-Original-Authentication-Results: gmr-mx.google.com; spf=pass (google.com: best guess record for domain of ldewangan@nvidia.com designates 216.228.121.140 as permitted sender) smtp.mail=ldewangan@nvidia.com Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: Sender: rtc-linux@googlegroups.com List-Subscribe: , List-Unsubscribe: , Add an RTC driver for TPS6586X chips by TI. This driver supports: - Setting and getting time and date. - Setting and reading alarm time. - Alarm and interrupt functionlity. Signed-off-by: Laxman Dewangan --- drivers/rtc/Kconfig | 8 + drivers/rtc/Makefile | 1 + drivers/rtc/rtc-tps6586x.c | 356 ++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 365 insertions(+), 0 deletions(-) create mode 100644 drivers/rtc/rtc-tps6586x.c diff --git a/drivers/rtc/Kconfig b/drivers/rtc/Kconfig index d0cea02..923a9da 100644 --- a/drivers/rtc/Kconfig +++ b/drivers/rtc/Kconfig @@ -352,6 +352,14 @@ config RTC_DRV_TWL4030 This driver can also be built as a module. If so, the module will be called rtc-twl. +config RTC_DRV_TPS6586X + tristate "TI TPS6586X RTC driver" + depends on MFD_TPS6586X + help + TI Power Managment IC TPS6586X supports RTC functionality + along with alarm. This driver supports the RTC driver for + the TPS6586X RTC module. + config RTC_DRV_TPS65910 tristate "TI TPS65910 RTC driver" depends on RTC_CLASS && MFD_TPS65910 diff --git a/drivers/rtc/Makefile b/drivers/rtc/Makefile index c3f62c8..4418ef3 100644 --- a/drivers/rtc/Makefile +++ b/drivers/rtc/Makefile @@ -111,6 +111,7 @@ obj-$(CONFIG_RTC_DRV_TEGRA) += rtc-tegra.o obj-$(CONFIG_RTC_DRV_TEST) += rtc-test.o obj-$(CONFIG_RTC_DRV_TILE) += rtc-tile.o obj-$(CONFIG_RTC_DRV_TWL4030) += rtc-twl.o +obj-$(CONFIG_RTC_DRV_TPS6586X) += rtc-tps6586x.o obj-$(CONFIG_RTC_DRV_TPS65910) += rtc-tps65910.o obj-$(CONFIG_RTC_DRV_TX4939) += rtc-tx4939.o obj-$(CONFIG_RTC_DRV_V3020) += rtc-v3020.o diff --git a/drivers/rtc/rtc-tps6586x.c b/drivers/rtc/rtc-tps6586x.c new file mode 100644 index 0000000..63da069 --- /dev/null +++ b/drivers/rtc/rtc-tps6586x.c @@ -0,0 +1,356 @@ +/* + * rtc-tps6586x.c: RTC driver for TI PMIC TPS6586X + * + * Copyright (c) 2012, NVIDIA Corporation. + * + * Author: Laxman Dewangan + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any kind, + * whether express or implied; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA + * 02111-1307, USA + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define RTC_CTRL 0xc0 +#define POR_RESET_N BIT(7) +#define OSC_SRC_SEL BIT(6) +#define RTC_ENABLE BIT(5) /* enables alarm */ +#define RTC_BUF_ENABLE BIT(4) /* 32 KHz buffer enable */ +#define PRE_BYPASS BIT(3) /* 0=1KHz or 1=32KHz updates */ +#define CL_SEL_MASK (BIT(2)|BIT(1)) +#define CL_SEL_POS 1 +#define RTC_ALARM1_HI 0xc1 +#define RTC_COUNT4 0xc6 + +/* start a PMU RTC access by reading the register prior to the RTC_COUNT4 */ +#define RTC_COUNT4_DUMMYREAD 0xc5 + +/*only 14-bits width in second*/ +#define ALM1_VALID_RANGE_IN_SEC 0x3FFF + +#define TPS6586X_RTC_CL_SEL_1_5PF 0x0 +#define TPS6586X_RTC_CL_SEL_6_5PF 0x1 +#define TPS6586X_RTC_CL_SEL_7_5PF 0x2 +#define TPS6586X_RTC_CL_SEL_12_5PF 0x3 + +struct tps6586x_rtc { + struct device *dev; + struct rtc_device *rtc; + int irq; + bool irq_en; + unsigned long long epoch_start; +}; + +static inline struct device *to_tps6586x_dev(struct device *dev) +{ + return dev->parent; +} + +static int tps6586x_rtc_read_time(struct device *dev, struct rtc_time *tm) +{ + struct tps6586x_rtc *rtc = dev_get_drvdata(dev); + struct device *tps_dev = to_tps6586x_dev(dev); + unsigned long long ticks = 0; + unsigned long seconds; + u8 buff[6]; + int ret; + int i; + + ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD, sizeof(buff), buff); + if (ret < 0) { + dev_err(dev, "read counter failed with err %d\n", ret); + return ret; + } + + for (i = 1; i < sizeof(buff); i++) { + ticks <<= 8; + ticks |= buff[i]; + } + + seconds = ticks >> 10; + seconds += rtc->epoch_start; + rtc_time_to_tm(seconds, tm); + return rtc_valid_tm(tm); +} + +static int tps6586x_rtc_set_time(struct device *dev, struct rtc_time *tm) +{ + struct tps6586x_rtc *rtc = dev_get_drvdata(dev); + struct device *tps_dev = to_tps6586x_dev(dev); + unsigned long long ticks; + unsigned long seconds; + u8 buff[5]; + int ret; + + rtc_tm_to_time(tm, &seconds); + if (WARN_ON(seconds < rtc->epoch_start)) { + dev_err(dev, "requested time unsupported\n"); + return -EINVAL; + } + seconds -= rtc->epoch_start; + + ticks = (unsigned long long)seconds << 10; + buff[0] = (ticks >> 32) & 0xff; + buff[1] = (ticks >> 24) & 0xff; + buff[2] = (ticks >> 16) & 0xff; + buff[3] = (ticks >> 8) & 0xff; + buff[4] = ticks & 0xff; + + /* Disable RTC before changing time */ + ret = tps6586x_clr_bits(tps_dev, RTC_CTRL, RTC_ENABLE); + if (ret < 0) { + dev_err(dev, "failed to clear RTC_ENABLE\n"); + return ret; + } + + ret = tps6586x_writes(tps_dev, RTC_COUNT4, sizeof(buff), buff); + if (ret < 0) { + dev_err(dev, "failed to program new time\n"); + return ret; + } + + /* Enable RTC */ + ret = tps6586x_set_bits(tps_dev, RTC_CTRL, RTC_ENABLE); + if (ret < 0) { + dev_err(dev, "failed to set RTC_ENABLE\n"); + return ret; + } + return 0; +} + +static int tps6586x_rtc_alarm_irq_enable(struct device *dev, + unsigned int enabled) +{ + struct tps6586x_rtc *rtc = dev_get_drvdata(dev); + + if (enabled && !rtc->irq_en) { + enable_irq(rtc->irq); + rtc->irq_en = true; + } else if (!enabled && rtc->irq_en) { + disable_irq(rtc->irq); + rtc->irq_en = false; + } + return 0; +} + +static int tps6586x_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct tps6586x_rtc *rtc = dev_get_drvdata(dev); + struct device *tps_dev = to_tps6586x_dev(dev); + unsigned long seconds; + unsigned long ticks; + unsigned long rtc_current_time; + unsigned long long rticks = 0; + u8 buff[3]; + u8 rbuff[6]; + int ret; + int i; + + rtc_tm_to_time(&alrm->time, &seconds); + + if (WARN_ON(alrm->enabled && (seconds < rtc->epoch_start))) { + dev_err(dev, "can't set alarm to requested time\n"); + return -EINVAL; + } + + ret = tps6586x_rtc_alarm_irq_enable(dev, alrm->enabled); + if (ret < 0) { + dev_err(dev, "can't set alarm irq, err %d\n", ret); + return ret; + } + + seconds -= rtc->epoch_start; + ret = tps6586x_reads(tps_dev, RTC_COUNT4_DUMMYREAD, + sizeof(rbuff), rbuff); + if (ret < 0) { + dev_err(dev, "read counter failed with err %d\n", ret); + return ret; + } + + for (i = 1; i < sizeof(rbuff); i++) { + rticks <<= 8; + rticks |= rbuff[i]; + } + + rtc_current_time = rticks >> 10; + if ((seconds - rtc_current_time) > ALM1_VALID_RANGE_IN_SEC) + seconds = rtc_current_time - 1; + + ticks = (unsigned long long)seconds << 10; + buff[0] = (ticks >> 16) & 0xff; + buff[1] = (ticks >> 8) & 0xff; + buff[2] = ticks & 0xff; + + ret = tps6586x_writes(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff); + if (ret) + dev_err(dev, "programming alarm failed with err %d\n", ret); + + return ret; +} + +static int tps6586x_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm) +{ + struct tps6586x_rtc *rtc = dev_get_drvdata(dev); + struct device *tps_dev = to_tps6586x_dev(dev); + unsigned long ticks; + unsigned long seconds; + u8 buff[3]; + int ret; + + ret = tps6586x_reads(tps_dev, RTC_ALARM1_HI, sizeof(buff), buff); + if (ret) { + dev_err(dev, "read RTC_ALARM1_HI failed with err %d\n", ret); + return ret; + } + + ticks = (buff[0] << 16) | (buff[1] << 8) | buff[2]; + seconds = ticks >> 10; + seconds += rtc->epoch_start; + + rtc_time_to_tm(seconds, &alrm->time); + return 0; +} + +static const struct rtc_class_ops tps6586x_rtc_ops = { + .read_time = tps6586x_rtc_read_time, + .set_time = tps6586x_rtc_set_time, + .set_alarm = tps6586x_rtc_set_alarm, + .read_alarm = tps6586x_rtc_read_alarm, + .alarm_irq_enable = tps6586x_rtc_alarm_irq_enable, +}; + +static irqreturn_t tps6586x_rtc_irq(int irq, void *data) +{ + struct tps6586x_rtc *rtc = data; + + rtc_update_irq(rtc->rtc, 1, RTC_IRQF | RTC_AF); + return IRQ_HANDLED; +} + +static int tps6586x_rtc_probe(struct platform_device *pdev) +{ + struct device *tps_dev = to_tps6586x_dev(&pdev->dev); + struct tps6586x_rtc *rtc; + int ret; + + rtc = devm_kzalloc(&pdev->dev, sizeof(*rtc), GFP_KERNEL); + if (!rtc) { + dev_err(&pdev->dev, "Memory allocation failed\n"); + return -ENOMEM; + } + + rtc->dev = &pdev->dev; + rtc->irq = platform_get_irq(pdev, 0); + ret = request_threaded_irq(rtc->irq, NULL, tps6586x_rtc_irq, + IRQF_ONESHOT | IRQF_EARLY_RESUME, + dev_name(&pdev->dev), rtc); + if (ret < 0) { + dev_err(&pdev->dev, "request IRQ(%d) failed with ret %d\n", + rtc->irq, ret); + return ret; + } + disable_irq(rtc->irq); + + /* Set epoch start as 00:00:00:01:01:2000 */ + rtc->epoch_start = mktime(2000, 1, 1, 0, 0, 0); + + /* 1 kHz tick mode, enable tick counting */ + ret = tps6586x_update(tps_dev, RTC_CTRL, + RTC_ENABLE | OSC_SRC_SEL | + ((TPS6586X_RTC_CL_SEL_1_5PF << CL_SEL_POS) & CL_SEL_MASK), + RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK); + if (ret < 0) { + dev_err(&pdev->dev, "unable to start counter\n"); + goto fail_rtc_init; + } + + platform_set_drvdata(pdev, rtc); + rtc->rtc = rtc_device_register(dev_name(&pdev->dev), &pdev->dev, + &tps6586x_rtc_ops, THIS_MODULE); + if (IS_ERR(rtc->rtc)) { + ret = PTR_ERR(rtc->rtc); + dev_err(&pdev->dev, "RTC device register: ret %d\n", ret); + goto fail_rtc_register; + } + device_set_wakeup_capable(&pdev->dev, 1); + return 0; + +fail_rtc_register: + tps6586x_update(tps_dev, RTC_CTRL, 0, + RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK); +fail_rtc_init: + free_irq(rtc->irq, rtc); + return ret; +}; + +static int tps6586x_rtc_remove(struct platform_device *pdev) +{ + struct tps6586x_rtc *rtc = platform_get_drvdata(pdev); + struct device *tps_dev = to_tps6586x_dev(&pdev->dev); + + tps6586x_update(tps_dev, RTC_CTRL, 0, + RTC_ENABLE | OSC_SRC_SEL | PRE_BYPASS | CL_SEL_MASK); + free_irq(rtc->irq, rtc); + rtc_device_unregister(rtc->rtc); + return 0; +} + +#ifdef CONFIG_PM_SLEEP +static int tps6586x_rtc_suspend(struct device *dev) +{ + struct tps6586x_rtc *rtc = dev_get_drvdata(dev); + + if (device_may_wakeup(dev)) + enable_irq_wake(rtc->irq); + return 0; +}; + +static int tps6586x_rtc_resume(struct device *dev) +{ + struct tps6586x_rtc *rtc = dev_get_drvdata(dev); + + if (device_may_wakeup(dev)) + disable_irq_wake(rtc->irq); + return 0; +}; +#endif + +static const struct dev_pm_ops tps6586x_pm_ops = { + SET_SYSTEM_SLEEP_PM_OPS(tps6586x_rtc_suspend, tps6586x_rtc_resume) +}; + +static struct platform_driver tps6586x_rtc_driver = { + .driver = { + .name = "tps6586x-rtc", + .owner = THIS_MODULE, + .pm = &tps6586x_pm_ops, + }, + .probe = tps6586x_rtc_probe, + .remove = tps6586x_rtc_remove, +}; +module_platform_driver(tps6586x_rtc_driver); + +MODULE_ALIAS("platform:rtc-tps6586x"); +MODULE_DESCRIPTION("TI TPS6586x RTC driver"); +MODULE_AUTHOR("Laxman dewangan "); +MODULE_LICENSE("GPL v2");