From patchwork Thu Oct 18 16:06:10 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: stigge@antcom.de X-Patchwork-Id: 192378 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from mail-ea0-f184.google.com (mail-ea0-f184.google.com [209.85.215.184]) (using TLSv1 with cipher ECDHE-RSA-RC4-SHA (128/128 bits)) (Client CN "smtp.gmail.com", Issuer "Google Internet Authority" (not verified)) by ozlabs.org (Postfix) with ESMTPS id E2FF22C0092 for ; Fri, 19 Oct 2012 03:06:28 +1100 (EST) Received: by mail-ea0-f184.google.com with SMTP id c12sf2221544eaa.11 for ; Thu, 18 Oct 2012 09:06:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=googlegroups.com; s=20120806; h=mime-version:x-beenthere:received-spf:from:to:cc:subject:date :message-id:x-mailer:in-reply-to:references:x-feas-system-wl :x-original-sender:x-original-authentication-results:reply-to :precedence:mailing-list:list-id:x-google-group-id:list-post :list-help:list-archive:sender:list-subscribe:list-unsubscribe :content-type; bh=e5RlQDRb2K4Yicc8+G8GQsopY+CBQVS51X9m4QUgInk=; b=VlHDL0L9YJUzPg1ZbUoaBWYKYwfOmruXgTNQck2S/+BzrP83HIPuwCTKge4lThP54R 2ZGbLFoX+AMfpYzSLYm8NnePe3F7fuNPzEPG+7n6+ra/IPP/DN5ZpYJoq4So5becTDP8 o0B2xSilyGWvdhtwuJPCDaens5nJlkoIwEPGTPA+2TyPgeexISOACJq23iBRucb9Ty1H JJjJ97lHht97+HWZFT9uFXaU8evZ4POMQYjKpoK07/N/cbqJ9bihAc1gss3R2PZpOHiM qPMk2MpMwLK4TxCrXSTgjPY/PgVEmjRrwOrEdV2H0cO+anhp5FYbX5Fo9cLPPLtLGhtO 6P7w== Received: by 10.204.129.220 with SMTP id p28mr1963436bks.1.1350576384997; Thu, 18 Oct 2012 09:06:24 -0700 (PDT) MIME-Version: 1.0 X-BeenThere: rtc-linux@googlegroups.com Received: by 10.205.124.16 with SMTP id gm16ls666765bkc.7.gmail; Thu, 18 Oct 2012 09:06:23 -0700 (PDT) Received: by 10.204.148.22 with SMTP id n22mr811234bkv.0.1350576383850; Thu, 18 Oct 2012 09:06:23 -0700 (PDT) Received: by 10.204.148.22 with SMTP id n22mr811233bkv.0.1350576383836; Thu, 18 Oct 2012 09:06:23 -0700 (PDT) Received: from work-microwave.de (mail.work-microwave.de. [62.245.205.51]) by gmr-mx.google.com with ESMTPS id v13si2499416bkw.0.2012.10.18.09.06.23 (version=TLSv1/SSLv3 cipher=OTHER); Thu, 18 Oct 2012 09:06:23 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of rst@work-microwave.de designates 62.245.205.51 as permitted sender) client-ip=62.245.205.51; Received: from rst-pc1.lan.work-microwave.de ([192.168.11.78]) (authenticated bits=0) by mail.work-microwave.de with ESMTP id q9IG6JUb029591 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO); Thu, 18 Oct 2012 17:06:20 +0100 Received: by rst-pc1.lan.work-microwave.de (Postfix, from userid 1000) id 97274AE06B; Thu, 18 Oct 2012 18:06:19 +0200 (CEST) From: Roland Stigge To: a.zummo@towertech.it, grant.likely@secretlab.ca, rob.herring@calxeda.com, rtc-linux@googlegroups.com, linux-kernel@vger.kernel.org, devicetree-discuss@lists.ozlabs.org, s.hauer@pengutronix.de, linux-arm-kernel@lists.infradead.org Cc: Roland Stigge Subject: [rtc-linux] [PATCH] ARM: mach-imx: Support for DryIce RTC in i.MX53 Date: Thu, 18 Oct 2012 18:06:10 +0200 Message-Id: <1350576370-29098-3-git-send-email-stigge@antcom.de> X-Mailer: git-send-email 1.7.10.4 In-Reply-To: <1350576370-29098-1-git-send-email-stigge@antcom.de> References: <1350576370-29098-1-git-send-email-stigge@antcom.de> X-FEAS-SYSTEM-WL: rst@work-microwave.de, 192.168.11.78 X-Original-Sender: stigge@antcom.de X-Original-Authentication-Results: gmr-mx.google.com; spf=pass (google.com: best guess record for domain of rst@work-microwave.de designates 62.245.205.51 as permitted sender) smtp.mail=rst@work-microwave.de Reply-To: rtc-linux@googlegroups.com Precedence: list Mailing-list: list rtc-linux@googlegroups.com; contact rtc-linux+owners@googlegroups.com List-ID: X-Google-Group-Id: 712029733259 List-Post: , List-Help: , List-Archive: Sender: rtc-linux@googlegroups.com List-Subscribe: , List-Unsubscribe: , This patch enables support for i.MX53 in addition to i.MX25 by providing a dummy clock on i.MX53 since this one doesn't have a separate clock for internal RTC but the driver requests one. Signed-off-by: Roland Stigge --- arch/arm/mach-imx/clk-imx51-imx53.c | 1 + 1 file changed, 1 insertion(+) --- linux-2.6.orig/arch/arm/mach-imx/clk-imx51-imx53.c +++ linux-2.6/arch/arm/mach-imx/clk-imx51-imx53.c @@ -467,6 +467,7 @@ int __init mx53_clocks_init(unsigned lon clk_register_clkdev(clk[can1_serial_gate], "per", "53fc8000.can"); clk_register_clkdev(clk[can2_ipg_gate], "ipg", "53fcc000.can"); clk_register_clkdev(clk[can2_serial_gate], "per", "53fcc000.can"); + clk_register_clkdev(clk[dummy], NULL, "53fa4000.rtc"); /* set SDHC root clock to 200MHZ*/ clk_set_rate(clk[esdhc_a_podf], 200000000);