From patchwork Mon Jun 21 06:04:00 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 56288 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id CE65CB7D80 for ; Mon, 21 Jun 2010 16:11:00 +1000 (EST) Received: from localhost ([127.0.0.1]:45468 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OQaDh-0003Zv-In for incoming@patchwork.ozlabs.org; Mon, 21 Jun 2010 02:10:57 -0400 Received: from [140.186.70.92] (port=33946 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OQaAj-0002Nb-3n for qemu-devel@nongnu.org; Mon, 21 Jun 2010 02:07:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OQaAg-0000nc-5C for qemu-devel@nongnu.org; Mon, 21 Jun 2010 02:07:52 -0400 Received: from mail.valinux.co.jp ([210.128.90.3]:46850) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OQaAf-0000mZ-Lt for qemu-devel@nongnu.org; Mon, 21 Jun 2010 02:07:50 -0400 Received: from ps.local.valinux.co.jp (vagw.valinux.co.jp [210.128.90.14]) by mail.valinux.co.jp (Postfix) with SMTP id 7DBA6107401; Mon, 21 Jun 2010 15:07:45 +0900 (JST) Received: (nullmailer pid 18099 invoked by uid 1000); Mon, 21 Jun 2010 06:04:01 -0000 From: Isaku Yamahata To: qemu-devel@nongnu.org Date: Mon, 21 Jun 2010 15:04:00 +0900 Message-Id: X-Mailer: git-send-email 1.6.6.1 In-Reply-To: References: In-Reply-To: References: X-Virus-Scanned: clamav-milter 0.95.2 at va-mail.local.valinux.co.jp X-Virus-Status: Clean X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: yu.liu@freescale.com, mst@redhat.com, blauwirbel@gmail.com, yamahata@valinux.co.jp, paul@codesourcery.com, aurelien@aurel32.net Subject: [Qemu-devel] [PATCH v4 5/6] pci: use pci_create_simple_mf() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org use pci_create_simple_mf() for normal device which sets multifunction bit. At the moment, only pc_piix.c and mips_malta.c uses multifunction devices with piix3/4 pci-isa bridge. And other boards don't populate those devices. Signed-off-by: Isaku Yamahata --- hw/piix4.c | 3 +-- hw/piix_pci.c | 3 +-- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/hw/piix4.c b/hw/piix4.c index 03926a7..298c70f 100644 --- a/hw/piix4.c +++ b/hw/piix4.c @@ -93,7 +93,6 @@ static int piix4_initfn(PCIDevice *d) pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371AB_0); // 82371AB/EB/MB PIIX4 PCI-to-ISA bridge pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_ISA); - pci_conf[PCI_HEADER_TYPE] |= PCI_HEADER_TYPE_MULTI_FUNCTION; piix4_dev = d; qemu_register_reset(piix4_reset, d); @@ -104,7 +103,7 @@ int piix4_init(PCIBus *bus, int devfn) { PCIDevice *d; - d = pci_create_simple(bus, devfn, "PIIX4"); + d = pci_create_simple_mf(bus, devfn, 1, "PIIX4"); return d->devfn; } diff --git a/hw/piix_pci.c b/hw/piix_pci.c index 0b0c92b..7cd33e6 100644 --- a/hw/piix_pci.c +++ b/hw/piix_pci.c @@ -234,7 +234,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state, int *piix3_devfn, qemu_irq * *pi440fx_state = DO_UPCAST(PCII440FXState, dev, d); piix3 = DO_UPCAST(PIIX3State, dev, - pci_create_simple(b, -1, "PIIX3")); + pci_create_simple_mf(b, -1, 1, "PIIX3")); piix3->pic = pic; pci_bus_irqs(b, piix3_set_irq, pci_slot_get_pirq, piix3, 4); (*pi440fx_state)->piix3 = piix3; @@ -336,7 +336,6 @@ static int piix3_initfn(PCIDevice *dev) pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_INTEL); pci_config_set_device_id(pci_conf, PCI_DEVICE_ID_INTEL_82371SB_0); // 82371SB PIIX3 PCI-to-ISA bridge (Step A1) pci_config_set_class(pci_conf, PCI_CLASS_BRIDGE_ISA); - pci_conf[PCI_HEADER_TYPE] |= PCI_HEADER_TYPE_MULTI_FUNCTION; qemu_register_reset(piix3_reset, d); return 0;