From patchwork Fri Oct 7 07:19:36 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jan Kiszka X-Patchwork-Id: 118234 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [140.186.70.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 19A56B70DC for ; Fri, 7 Oct 2011 18:20:33 +1100 (EST) Received: from localhost ([::1]:46559 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RC4jM-0007r8-OT for incoming@patchwork.ozlabs.org; Fri, 07 Oct 2011 03:20:28 -0400 Received: from eggs.gnu.org ([140.186.70.92]:45254) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RC4j7-0007pk-Ap for qemu-devel@nongnu.org; Fri, 07 Oct 2011 03:20:14 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1RC4j5-0004HA-Dj for qemu-devel@nongnu.org; Fri, 07 Oct 2011 03:20:13 -0400 Received: from david.siemens.de ([192.35.17.14]:24500) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1RC4j5-0004Gl-2k for qemu-devel@nongnu.org; Fri, 07 Oct 2011 03:20:11 -0400 Received: from mail1.siemens.de (localhost [127.0.0.1]) by david.siemens.de (8.13.6/8.13.6) with ESMTP id p977K9N6003043; Fri, 7 Oct 2011 09:20:09 +0200 Received: from mchn199C.mchp.siemens.de ([139.22.57.218]) by mail1.siemens.de (8.13.6/8.13.6) with ESMTP id p977K5Dk029837; Fri, 7 Oct 2011 09:20:09 +0200 From: Jan Kiszka To: Anthony Liguori , qemu-devel Date: Fri, 7 Oct 2011 09:19:36 +0200 Message-Id: X-Mailer: git-send-email 1.7.3.4 In-Reply-To: References: In-Reply-To: References: X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6, seldom 2.4 (older, 4) X-Received-From: 192.35.17.14 Cc: Blue Swirl Subject: [Qemu-devel] [PATCH v2 03/23] pc: Convert GSIState::i8259_irq into array X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Will be required when we no longer let i8259_init allocate the PIC IRQs but convert that chips to qdev. Signed-off-by: Jan Kiszka --- hw/pc.h | 2 +- hw/pc_piix.c | 4 +++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/hw/pc.h b/hw/pc.h index 4333898..2870be4 100644 --- a/hw/pc.h +++ b/hw/pc.h @@ -76,7 +76,7 @@ void irq_info(Monitor *mon); #define GSI_NUM_PINS IOAPIC_NUM_PINS typedef struct GSIState { - qemu_irq *i8259_irq; + qemu_irq i8259_irq[ISA_NUM_IRQS]; qemu_irq ioapic_irq[IOAPIC_NUM_PINS]; } GSIState; diff --git a/hw/pc_piix.c b/hw/pc_piix.c index e6e280c..c89042f 100644 --- a/hw/pc_piix.c +++ b/hw/pc_piix.c @@ -158,7 +158,9 @@ static void pc_init1(MemoryRegion *system_memory, i8259 = xen_interrupt_controller_init(); } - gsi_state->i8259_irq = i8259; + for (i = 0; i < ISA_NUM_IRQS; i++) { + gsi_state->i8259_irq[i] = i8259[i]; + } if (pci_enabled) { ioapic_init(gsi_state); }