From patchwork Sat Sep 16 14:02:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: BALATON Zoltan X-Patchwork-Id: 814509 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (mailfrom) smtp.mailfrom=nongnu.org (client-ip=2001:4830:134:3::11; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [IPv6:2001:4830:134:3::11]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 3xvYzr17FXz9t2M for ; Sun, 17 Sep 2017 00:09:28 +1000 (AEST) Received: from localhost ([::1]:57429 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dtDmg-0006iD-6C for incoming@patchwork.ozlabs.org; Sat, 16 Sep 2017 10:09:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:42168) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dtDlp-0006fY-Rf for qemu-devel@nongnu.org; Sat, 16 Sep 2017 10:08:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dtDln-0003TM-Pq for qemu-devel@nongnu.org; Sat, 16 Sep 2017 10:08:33 -0400 Received: from zero.eik.bme.hu ([2001:738:2001:2001::2001]:41146) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dtDln-0003Sl-Ia for qemu-devel@nongnu.org; Sat, 16 Sep 2017 10:08:31 -0400 Received: from zero.eik.bme.hu (blah.eik.bme.hu [152.66.115.182]) by localhost (Postfix) with SMTP id 9F6917456F6; Sat, 16 Sep 2017 16:08:16 +0200 (CEST) Received: by zero.eik.bme.hu (Postfix, from userid 432) id ED3C57456EF; Sat, 16 Sep 2017 16:08:15 +0200 (CEST) Message-Id: In-Reply-To: References: From: BALATON Zoltan Date: Sat, 16 Sep 2017 16:02:41 +0200 To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:738:2001:2001::2001 Subject: [Qemu-devel] [PATCH v2 3/4] ppc4xx: Add more PLB registers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Francois Revol , Alexander Graf , David Gibson Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" These registers are present in 440 SoCs (and maybe in others too) and U-Boot accesses them when printing register info. We don't emulate these but add them to avoid crashing when they are read or written. Signed-off-by: BALATON Zoltan --- v2: No change, discussed in: http://lists.nongnu.org/archive/html/qemu-ppc/2017-08/msg00385.html hw/ppc/ppc405_uc.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/hw/ppc/ppc405_uc.c b/hw/ppc/ppc405_uc.c index e621d0a..8e58065 100644 --- a/hw/ppc/ppc405_uc.c +++ b/hw/ppc/ppc405_uc.c @@ -105,9 +105,12 @@ ram_addr_t ppc405_set_bootinfo (CPUPPCState *env, ppc4xx_bd_info_t *bd, /*****************************************************************************/ /* Peripheral local bus arbitrer */ enum { - PLB0_BESR = 0x084, - PLB0_BEAR = 0x086, - PLB0_ACR = 0x087, + PLB3A0_ACR = 0x077, + PLB4A0_ACR = 0x081, + PLB0_BESR = 0x084, + PLB0_BEAR = 0x086, + PLB0_ACR = 0x087, + PLB4A1_ACR = 0x089, }; typedef struct ppc4xx_plb_t ppc4xx_plb_t; @@ -179,9 +182,12 @@ void ppc4xx_plb_init(CPUPPCState *env) ppc4xx_plb_t *plb; plb = g_malloc0(sizeof(ppc4xx_plb_t)); + ppc_dcr_register(env, PLB3A0_ACR, plb, &dcr_read_plb, &dcr_write_plb); + ppc_dcr_register(env, PLB4A0_ACR, plb, &dcr_read_plb, &dcr_write_plb); ppc_dcr_register(env, PLB0_ACR, plb, &dcr_read_plb, &dcr_write_plb); ppc_dcr_register(env, PLB0_BEAR, plb, &dcr_read_plb, &dcr_write_plb); ppc_dcr_register(env, PLB0_BESR, plb, &dcr_read_plb, &dcr_write_plb); + ppc_dcr_register(env, PLB4A1_ACR, plb, &dcr_read_plb, &dcr_write_plb); qemu_register_reset(ppc4xx_plb_reset, plb); }