From patchwork Thu Jun 17 11:03:15 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Isaku Yamahata X-Patchwork-Id: 56012 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [199.232.76.165]) (using TLSv1 with cipher DHE-RSA-AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 90E64B7D64 for ; Thu, 17 Jun 2010 21:09:13 +1000 (EST) Received: from localhost ([127.0.0.1]:54152 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OPCy5-00039G-56 for incoming@patchwork.ozlabs.org; Thu, 17 Jun 2010 07:09:09 -0400 Received: from [140.186.70.92] (port=37960 helo=eggs.gnu.org) by lists.gnu.org with esmtp (Exim 4.43) id 1OPCw3-00034A-OA for qemu-devel@nongnu.org; Thu, 17 Jun 2010 07:07:05 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.69) (envelope-from ) id 1OPCw0-0001L3-Vz for qemu-devel@nongnu.org; Thu, 17 Jun 2010 07:07:03 -0400 Received: from mail.valinux.co.jp ([210.128.90.3]:46428) by eggs.gnu.org with esmtp (Exim 4.69) (envelope-from ) id 1OPCw0-0001KB-Gl for qemu-devel@nongnu.org; Thu, 17 Jun 2010 07:07:00 -0400 Received: from ps.local.valinux.co.jp (vagw.valinux.co.jp [210.128.90.14]) by mail.valinux.co.jp (Postfix) with SMTP id 2B9701072BE; Thu, 17 Jun 2010 20:06:57 +0900 (JST) Received: (nullmailer pid 8749 invoked by uid 1000); Thu, 17 Jun 2010 11:03:16 -0000 From: Isaku Yamahata To: seabios@seabios.org Date: Thu, 17 Jun 2010 20:03:15 +0900 Message-Id: X-Mailer: git-send-email 1.6.6.1 In-Reply-To: References: In-Reply-To: References: X-Virus-Scanned: clamav-milter 0.95.2 at va-mail.local.valinux.co.jp X-Virus-Status: Clean X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.6 (newer, 3) Cc: stefano.stabellini@eu.citrix.com, jan.kiszka@siemens.com, mst@redhat.com, allen.m.kay@intel.com, qemu-devel@nongnu.org, yamahata@valinux.co.jp, jean.guyader@gmail.com Subject: [Qemu-devel] [PATCH 7/8] seabios: pciinit: pci bridge bus initialization. X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: qemu-devel.nongnu.org List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org pci bridge bus initialization. Signed-off-by: Isaku Yamahata --- src/pciinit.c | 70 +++++++++++++++++++++++++++++++++++++++++++++++++++++++++ 1 files changed, 70 insertions(+), 0 deletions(-) diff --git a/src/pciinit.c b/src/pciinit.c index 1c2c8c6..fe6848a 100644 --- a/src/pciinit.c +++ b/src/pciinit.c @@ -220,6 +220,74 @@ static void pci_bios_init_device(u16 bdf) } } +static void +pci_bios_init_bus_rec(int bus, u8 *pci_bus) +{ + int devfn, bdf; + u16 class; + + dprintf(1, "PCI: %s bus = 0x%x\n", __func__, bus); + + /* prevent accidental access to unintended devices */ + foreachpci_in_bus(bus, devfn, bdf) { + class = pci_config_readw(bdf, PCI_CLASS_DEVICE); + if (class == PCI_CLASS_BRIDGE_PCI) { + pci_config_writeb(bdf, PCI_SECONDARY_BUS, 255); + pci_config_writeb(bdf, PCI_SUBORDINATE_BUS, 0); + } + } + + foreachpci_in_bus(bus, devfn, bdf) { + class = pci_config_readw(bdf, PCI_CLASS_DEVICE); + if (class != PCI_CLASS_BRIDGE_PCI) { + continue; + } + dprintf(1, "PCI: %s bdf = 0x%x\n", __func__, bdf); + + u8 pribus = pci_config_readb(bdf, PCI_PRIMARY_BUS); + if (pribus != bus) { + dprintf(1, "PCI: primary bus = 0x%x -> 0x%x\n", pribus, bus); + pci_config_writeb(bdf, PCI_PRIMARY_BUS, bus); + } else { + dprintf(1, "PCI: primary bus = 0x%x\n", pribus); + } + + u8 secbus = pci_config_readb(bdf, PCI_SECONDARY_BUS); + (*pci_bus)++; + if (*pci_bus != secbus) { + dprintf(1, "PCI: secondary bus = 0x%x -> 0x%x\n", + secbus, *pci_bus); + secbus = *pci_bus; + pci_config_writeb(bdf, PCI_SECONDARY_BUS, secbus); + } else { + dprintf(1, "PCI: secondary bus = 0x%x\n", secbus); + } + + /* set to max for access to all subordinate buses. + later set it to accurate value */ + u8 subbus = pci_config_readb(bdf, PCI_SUBORDINATE_BUS); + pci_config_writeb(bdf, PCI_SUBORDINATE_BUS, 255); + + pci_bios_init_bus_rec(secbus, pci_bus); + + if (subbus != *pci_bus) { + dprintf(1, "PCI: subordinate bus = 0x%x -> 0x%x\n", + subbus, *pci_bus); + subbus = *pci_bus; + } else { + dprintf(1, "PCI: subordinate bus = 0x%x\n", subbus); + } + pci_config_writeb(bdf, PCI_SUBORDINATE_BUS, subbus); + } +} + +static void +pci_bios_init_bus(void) +{ + u8 pci_bus = 0; + pci_bios_init_bus_rec(0 /* host bus */, &pci_bus); +} + void pci_setup(void) { @@ -235,6 +303,8 @@ pci_setup(void) /* pci_bios_mem_addr + */ pci_bios_prefmem_addr = pci_bios_mem_addr + 0x08000000; + pci_bios_init_bus(); + int bdf, max; foreachpci(bdf, max) { pci_bios_init_bridges(bdf);