From patchwork Wed Oct 3 07:48:32 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Peter A. G. Crosthwaite" X-Patchwork-Id: 188717 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (Client did not present a certificate) by ozlabs.org (Postfix) with ESMTPS id 9738B2C00E3 for ; Wed, 3 Oct 2012 17:50:03 +1000 (EST) Received: from localhost ([::1]:44870 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJJiT-000213-IC for incoming@patchwork.ozlabs.org; Wed, 03 Oct 2012 03:50:01 -0400 Received: from eggs.gnu.org ([208.118.235.92]:50191) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJJhu-0001AF-Gc for qemu-devel@nongnu.org; Wed, 03 Oct 2012 03:49:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1TJJho-0005HQ-HU for qemu-devel@nongnu.org; Wed, 03 Oct 2012 03:49:26 -0400 Received: from mail-da0-f45.google.com ([209.85.210.45]:44761) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1TJJho-0004uD-Br for qemu-devel@nongnu.org; Wed, 03 Oct 2012 03:49:20 -0400 Received: by mail-da0-f45.google.com with SMTP id n15so2309233dad.4 for ; Wed, 03 Oct 2012 00:49:20 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20120113; h=from:to:cc:subject:date:message-id:x-mailer:in-reply-to:references :in-reply-to:references:x-gm-message-state; bh=LxKgWyG60zZCC6JrwOB5Qr3CjY70enTgThP1iIBEm38=; b=VKj53439Fg7Kw6nIwIRFDtH+3nwKIrXYSupF08DDeBKwPy5SxFLbrkAKLltB+94k9/ 1xJ0mxxDqIqPHivV9YMUrqjGdVGT9IfbZKZOerz6tPAJR37jfb4ILeG2WL9ZunHIrPN+ pgTzeaEoKjbTeFmGQIVe4yhh2RxuZG9xX3RPncnXtvj9E9OISw1k55EgZ+atAdis6vz5 ONAC05B9/ZAWWpf1HkPY76AtGp2BqOi5THSTRzj/lU3lyIBEYUBEnMjxIvb6Ik2+0aKO UK028XD53FXF9E48mlk71qJdFD+7s+WANXJYqyyFjjNDY3xm+HVDNPVssAsMdLTMg0Ga DoQA== Received: by 10.66.78.195 with SMTP id d3mr3224866pax.17.1349250559932; Wed, 03 Oct 2012 00:49:19 -0700 (PDT) Received: from localhost ([124.148.20.9]) by mx.google.com with ESMTPS id gk5sm2228912pbc.21.2012.10.03.00.49.16 (version=TLSv1/SSLv3 cipher=OTHER); Wed, 03 Oct 2012 00:49:19 -0700 (PDT) From: Peter Crosthwaite To: qemu-devel@nongnu.org, paul@codesourcery.com, edgar.iglesias@gmail.com, peter.maydell@linaro.org, stefanha@gmail.com Date: Wed, 3 Oct 2012 17:48:32 +1000 Message-Id: X-Mailer: git-send-email 1.7.0.4 In-Reply-To: References: In-Reply-To: References: X-Gm-Message-State: ALoCoQlc7cyySSN/M6MrCYNzs+T2Ei64RWr/NxMvjnWLwkNgoTkoGCAK8Jcf/lVYQv4vM3xRixG6 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 209.85.210.45 Cc: blauwirbel@gmail.com, "Peter A. G. Crosthwaite" , i.mitsyanko@samsung.com Subject: [Qemu-devel] [PATCH v8 04/14] qdev: allow multiple qdev_init_gpio_in() calls X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.14 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Peter A. G. Crosthwaite Allow multiple qdev_init_gpio_in() calls for the one device. The first call will define GPIOs 0-N-1, the next GPIOs N- ... . Allows different GPIOs to be handled with different handlers. Needed when two levels of the QOM class heirachy both define GPIO functionality, as a single GPIO handler with an index selecter is not possible. Signed-off-by: Peter A. G. Crosthwaite --- changed since v7: fixed function proto identation s/g_new0/g_new/ for consistency with g_renew fixed free'ing behaviour by g_renewing "p" as well changed since v5: moved implementation to irq.c as per PMM review hw/irq.c | 27 ++++++++++++++++++++------- hw/irq.h | 11 ++++++++++- hw/qdev.c | 6 +++--- 3 files changed, 33 insertions(+), 11 deletions(-) diff --git a/hw/irq.c b/hw/irq.c index d413a0b..f4e2a78 100644 --- a/hw/irq.c +++ b/hw/irq.c @@ -38,24 +38,37 @@ void qemu_set_irq(qemu_irq irq, int level) irq->handler(irq->opaque, irq->n, level); } -qemu_irq *qemu_allocate_irqs(qemu_irq_handler handler, void *opaque, int n) +qemu_irq *qemu_extend_irqs(qemu_irq *old, int n_old, qemu_irq_handler handler, + void *opaque, int n) { qemu_irq *s; struct IRQState *p; int i; - s = (qemu_irq *)g_malloc0(sizeof(qemu_irq) * n); - p = (struct IRQState *)g_malloc0(sizeof(struct IRQState) * n); - for (i = 0; i < n; i++) { - p->handler = handler; - p->opaque = opaque; - p->n = i; + if (!old) { + n_old = 0; + } + s = old ? g_renew(qemu_irq, old, n + n_old) : g_new(qemu_irq, n); + p = old ? g_renew(struct IRQState, s[0], n + n_old) : + g_new(struct IRQState, n); + for (i = 0; i < n + n_old; i++) { + if (i >= n_old) { + p->handler = handler; + p->opaque = opaque; + p->n = i; + } s[i] = p; p++; } return s; } +qemu_irq *qemu_allocate_irqs(qemu_irq_handler handler, void *opaque, int n) +{ + return qemu_extend_irqs(NULL, 0, handler, opaque, n); +} + + void qemu_free_irqs(qemu_irq *s) { g_free(s[0]); diff --git a/hw/irq.h b/hw/irq.h index 56c55f0..e640c10 100644 --- a/hw/irq.h +++ b/hw/irq.h @@ -23,8 +23,17 @@ static inline void qemu_irq_pulse(qemu_irq irq) qemu_set_irq(irq, 0); } -/* Returns an array of N IRQs. */ +/* Returns an array of N IRQs. Each IRQ is assigned the argument handler and + * opaque data. + */ qemu_irq *qemu_allocate_irqs(qemu_irq_handler handler, void *opaque, int n); + +/* Extends an Array of IRQs. Old IRQs have their handlers and opaque data + * preserved. New IRQs are assigned the argument handler and opaque data. + */ +qemu_irq *qemu_extend_irqs(qemu_irq *old, int n_old, qemu_irq_handler handler, + void *opaque, int n); + void qemu_free_irqs(qemu_irq *s); /* Returns a new IRQ with opposite polarity. */ diff --git a/hw/qdev.c b/hw/qdev.c index b5a52ac..eea9eae 100644 --- a/hw/qdev.c +++ b/hw/qdev.c @@ -291,9 +291,9 @@ BusState *qdev_get_parent_bus(DeviceState *dev) void qdev_init_gpio_in(DeviceState *dev, qemu_irq_handler handler, int n) { - assert(dev->num_gpio_in == 0); - dev->num_gpio_in = n; - dev->gpio_in = qemu_allocate_irqs(handler, dev, n); + dev->gpio_in = qemu_extend_irqs(dev->gpio_in, dev->num_gpio_in, handler, + dev, n); + dev->num_gpio_in += n; } void qdev_init_gpio_out(DeviceState *dev, qemu_irq *pins, int n)